Multilevel Cache System - HP ProLiant DL560 Technology Brief

Figure 7. The system BIOS counts processors.
The method of counting physical and logical processors determines per-processor license compliance.
In a two-processor system like the one in Figure 7, if the OS cannot differentiate between physical
and logical processors, the system exceeds the license limit for a two-processor OS. Microsoft®
Windows® 2000 Server products, for example, count logical processors; once the count reaches the
license limit, these operating systems will not use other available logical processors. On the other
hand, Windows Server 2003 products count only the physical processors and therefore use all the
logical processors. For example, Windows Server 2003, Standard Edition has a two-processor
licensing limit. However, in a two-processor system using Xeon processors with Hyper-Threading
technology, Windows Server 2003 operating systems can get the benefit of four logical processors.
The table that records the processors in the BIOS allows Windows Server 2003 to resolve logical
processors to their associated physical processors.
Operating systems that are aware of Hyper-Threading schedule application threads to run on logical
processors in the same way they manage physical processors. With Hyper-Threading technology, an
OS schedules threads not only to separate processors, but also to separate logical processors on a
single physical processor.
Because of the way the OS counts and identifies processors, the OS always schedules threads to
logical processors on different physical processors before scheduling multiple threads to the same
physical processor. This optimization allows software threads to use different physical execution
resources when possible.
The second logical processor can be turned off when it is not needed. A HALT instruction is issued to
the inactive logical processor. Without this instruction, an OS may execute on the idle logical
processor a sequence of instructions that repeatedly checks for work to perform. This so-called "idle
loop" can consume significant execution resources that the active logical processor could otherwise
be using.
If needed, system administrators can disable Hyper-Threading in the ROM-Based Setup Utility (RBSU).
This action may be necessary for testing or verifying performance gains for enterprise applications.
Also, it is possible that some applications not designed for Hyper-Threading may not perform as well
with Hyper-Threading turned on.
For additional information about Hyper-Threading, visit Intel's Hyper-Threading Technology website at
www.intel.com/technology/hyperthread/index.htm.

Multilevel cache system

Another important feature of the Intel Xeon processor MP is its integrated Level 3 (L3) cache
architecture, which increases throughput to memory for improved performance.
The value of caching lies in the probability that a processor will again need information it has recently
accessed in system memory. Just as a carpenter uses a tool belt to keep frequently used tools nearby,
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