EAI 580 Reference Handbook page 8

CONTENTS (Cant)
CHAPTER 10 - CONTROL TRAY (Continued)
10.2 DVM PATCH TERMINAL ....•••••..•...••.••.•.•.. 10-1
10.3 VM PATCH TERMINAL
10.4 IC
AND
OP PATCH TERMINALS
10.5 SCOPE PATCH TERMINALS
10.6 PLOTTER PATCH TERMINALS
10.7 CHT ON PATCH TERMINALS
10.8 RDAC PATCH TERMINAL
10.9 A SEL PATCH TERMINAL
10.10 TIMER PATCH TERMINALS
10-1
10-1
10-3
10-3
10-3
10-3
10-3
10-3
10.11 OVD, ORR, AND OLS PATCH TERMINALS •..•.•.•... 10-4
10.12 PP PATCH TERMINAL ..•...•........•...•.••..•. 10-4
APPENDIX 1 - SIMPLE CIRCUITS USING AMPLIFIERS AND ATTENUATORS A1-1
APPENDIX 2 UNITY SCALING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A2-1
APPENDIX 3 - TRANSFER FUNCTION SIMULATION .....••...
0......
A3-1
APPENDIX 4 - REPRESENTATION OF CONSTRAINTS AND NONLINEARITIES A4-1
APPENDIX 5 - LOGIC PATCHING
APPENDIX 6 - BIBLIOGRAPHY
A5-1
A6-1
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