Terasic TRDB-D5M Manual

5 mega pixel digital camera development kit
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Terasic TRDB_D5M Digital Camera Package
TRDB_D5M
5 Mega Pixel Digital Camera Development Kit
Document Version 1.2
AUG. 10, 2010 by Terasic

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Summary of Contents for Terasic TRDB-D5M

  • Page 1 Terasic TRDB_D5M Digital Camera Package TRDB_D5M 5 Mega Pixel Digital Camera Development Kit Document Version 1.2 AUG. 10, 2010 by Terasic...
  • Page 2: Table Of Contents

    .............................. 4 ETTING CHAPTER 2 TRDB_D5M ........................... 5 2.1 F ..............................5 EATURES 2.2 P TRDB-D5M ................... 7 OUT OF THE PIN CONNECTOR ON 2.3 P TRDB_D5M ..............8 ESCRIPTION OF THE NTERFACE OF CHAPTER 3 DIGITAL CAMERA DESIGN DEMONSTRATION..............9 3.1 D...
  • Page 3: About The Kit

    Digital Camera Design Demonstration Chapter Chapter 1 About the Kit The TRDB_D5M Kit provides everything you need to develop a 5 Mega Pixel Digital Camera on the Altera DE4 / DE2_115 / DE2-70 / DE2 / DE1 boards. The kit contains hardware design (in Verilog) and software to load the picture taken into a PC and save it as a BMP or JPG file (DE2-70 only).
  • Page 4: Assemble The Camera

    Digital Camera Design Demonstration Assemble the Camera Please follow the step below to assemble your camera: Connect the D5M to your DE4 board as shown in Figure 1.2. Figure 1.2 Connect the D5M to DE4 board’s expansion port (outermost port). Connect the D5M to your DE2-115 board as shown in Figure 1.3.
  • Page 5 Digital Camera Design Demonstration Connect the D5M to your DE2 board as shown in Figure 1.5. Figure 1.5 Connect the D5M to DE2 board’s expansion port (outermost port). Connect the D5M to your DE1 board as shown in Figure 1.6. Figure 1.6 Connect the D5M to DE1 board’s expansion port (outermost port).
  • Page 6: Getting Help

    Digital Camera Design Demonstration Getting Help Here are some places to get help if you encounter any problem:  Email to support@terasic.com  Taiwan & China: +886-3-550-8800  Korea : +82-2-512-7661  Japan: +81-428-77-7000  English Support Line: +1-408-512-1336...
  • Page 7: Chapter 2 Trdb_D5M

    Digital Camera Design Demonstration Chapter Chapter 2 TRDB_D5M This chapter will illustrate the technical details users need to know to modify the reference design for their own purpose. Features The D5M kit is designed to use the same strict design and layout practices used in high-end consumer products.
  • Page 8 Digital Camera Design Demonstration Key Performance Parameters Parameter Value Active pixels 2,592H x 1,944V Pixel size 2.2μm x 2.2μm Color filter array RGB Bayer pattern Shutter type Global reset release (GRR), 96 Mp/s at 96 MHz Maximum data rate/master clock Full resolution Programmable up to 15 fps Frame rate...
  • Page 9: Pin-Out Of The 40-Pin Connector On Trdb-D5M

    Digital Camera Design Demonstration Pin-out of the 40-pin connector on TRDB-D5M PIXCLK XCLKIN RESETn TRIGGER STROBE LVAL FVAL SDATA SCLK VCC33 Figure 2.1. The pin-out of the 40-pin connector on TRDB_D5M...
  • Page 10: Pin Description Of The 40-Pin Interface Of Trdb_D5M

    Digital Camera Design Demonstration Pin Description of the 40-pin Interface of TRDB_D5M The TRDB_D5M has a 40-pin connector on the board. The pin description of the 40-pin connector follows: Pin Numbers Name Direction Description PIXCLK Output Pixel clock. D[11] Output Pixel data Bit 11 Not Connect D[10]...
  • Page 11: Digital Camera Design Demonstration

    Digital Camera Design Demonstration Chapter Chapter 3 Digital Camera Design Demonstration This chapter illustrates how to exercise the digital camera reference design provided with the kit. Users can follow the instructions in this chapter to build a 5 Mega Pixel camera using their DE4 / DE2_115 / DE2-70 / DE2 / DE1 in minutes. Demonstration Setup The image raw data is sent from D5M to the DE4 / DE2_115 /DE2-70 / DE2 / DE1 board.
  • Page 12: Camera Demonstration Setup O Nde4 Board

    Digital Camera Design Demonstration Camera Demonstration Setup On DE4 Board Locate the project directory from the CD-ROM included and follow the steps below: Directory: Demonstration / DE4_230/530_D5M_DVI FPGA Bitstream Used: DE4_230/530_ D5M_DVI.sof Ensure the connection is made correctly as shown in Figure 3.2. Make sure the D5M is connected to JP4 (GPIO 1) and DVI daughter card is connected to J20 (HSMC PORT A) of the DE4 board with two THCB-HMF2 interface cards which are bundled in the DE4 kit.
  • Page 13 Digital Camera Design Demonstration Figure 3.2. The Connection Setup for DE4 users Table 3.1 The functional keys of the digital camera demonstration Component Function Description BUTTON [0] Reset circuit BUTTON [1] Set the new exposure time (use with SW[0] ) BUTTON [2] Trigger the Image Capture (take a shot) BUTTON [3]...
  • Page 14: Camera Demonstration Setup O Nde2-115 Board

    Digital Camera Design Demonstration Camera Demonstration Setup On DE2-115 Board Locate the project directory from the CD-ROM included and follow the steps below: Directory: Demonstration / DE2_115_CAMERA FPGA Bitstream Used: DE2_115_ CAMERA.sof Ensure the GPIO voltage level is set to 3.3V via JP6 (GPIO_VCCIO) of the DE2-115 board.
  • Page 15 Digital Camera Design Demonstration Figure 3.3. The Connection Setup for DE2-115 users Table 3.2 The functional keys of the digital camera demonstration Component Function Description KEY[0] Reset circuit KEY[1] Set the new exposure time (use with SW[0] ) KEY[2] Trigger the Image Capture (take a shot) KEY[3] Switch to Free Run mode Off: Extend the exposure time...
  • Page 16: Configuring The Camera And Load The Image Captured To Your Pc (De2-70 Board Users)

    Digital Camera Design Demonstration Configuring the Camera and Load the Image Captured to Your PC (DE2-70 Board Users) Locate the project directory from the CD-ROM included and follow the steps below: Directory: Demonstration / DE2_70_CAMERA / SW FPGA Bitstream Used: DE2_70_ CAMERA.sof Ensure the connection is made correctly as shown in Figure 3.4.
  • Page 17 Digital Camera Design Demonstration with KEY0 and KEY3 pressed in order. 11. Table 3.3 summarizes the functional keys of the digital camera. Figure 3.4. The Connection Setup for DE2-70 users Table 3.3 The functional keys of the digital camera demonstration Component Function Description KEY[0]...
  • Page 18 Digital Camera Design Demonstration FREE RUN mode. 13. Click ‘Save’ button to save the captured image as a JPG or BMP file. Figure 3.5. The DE2_70_camera tool...
  • Page 19: Configuring The Camera (De2 Board Users)

    Digital Camera Design Demonstration Configuring the Camera (DE2 Board Users) Locate the project directory from the CD-ROM included and follow the steps below: Directory: Demonstration / DE2_CAMERA FPGA Bitstream Used: DE2_D5M.sof or DE2_D5M.pof Ensure the connection is set correctly as shown in Figure 3.6. Make sure the D5M is connected to JP2 (GPIO 1) of the DE2 board.
  • Page 20 Digital Camera Design Demonstration Table 3.4 The functional keys of the digital camera demonstration Component Function Description KEY[0] Reset circuit KEY[1] Set the new exposure time (use with SW[0] ) KEY[2] Trigger the Image Capture (take a shot) KEY[3] Switch to Free Run mode Off: Extend the exposure time SW[0] On: Shorten the exposure time...
  • Page 21: Configuring The Camera (De1 Board Users)

    Digital Camera Design Demonstration Configuring the Camera (DE1 Board Users) Locate the project directory from the CD-ROM included and follow the steps below: Directory: Demonstration / DE1_CAMERA FPGA Bitstream Used: DE1_D5M.sof or DE1_D5M.pof Ensure the connection is set correctly as shown in Figure 3.7. Make sure the D5M is connected to JP2 (GPIO 1) of the DE1 board.
  • Page 22 Digital Camera Design Demonstration Table 3.5 The functional keys of the digital camera demonstration Component Function Description KEY[0] Reset circuit KEY[1] Set the new exposure time (use with SW[0] ) KEY[2] Trigger the Image Capture (take a shot) KEY[3] Switch to Free Run mode Off: Extend the exposure time SW[0] On: Shorten the exposure time...
  • Page 23: Block Diagram Of The Reference Design

    Digital Camera Design Demonstration Block Diagram of the Reference Design The complete reference design is also located in the CD-ROM attached. Please refer to the following diagram to help you in reading the code provided. DATA FVAL DATA Bayer Color LVAL CMOS Pattern Data...
  • Page 24: Chapter 4 Appendix

    AUG, 03, 2009 revised AUG, 10, 2010 D5M on DE4 and DE2-115 Board Added Always Visit TRDB_D5M Webpage for New Applications We will be continuing providing interesting examples and labs on our TRDB_D5M webpage. Please visit d5m.terasic.com for more information. www.altera.com...

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