Linear Technology DC981A Manual

Description
Demonstration circuits 981A and 981B feature the
LTC 4263 in single port Power over Ethernet (PoE) power
®
sourcing equipment (PSE) midspan and endpoint solu-
tions. The LTC4263 is an autonomous single-channel PSE
controller for use in IEEE802.3af compliant PoE systems.
It includes an onboard planar power MOSFET, internal
inrush, current limit, and short-circuit control, powered
device (PD) detection and classification circuitry, and
selectable AC or DC disconnect sensing. Onboard control
algorithms provide complete PSE control operation without
the need of a microcontroller. The LTC4263 simplifies PSE
performance summary
Table 1. Typical DC981, Specifications are at T
PARAMETER
Supply Voltage
Midspan Mode Detection Backoff
Detection Range
Set Maximum Allocated Power
Ethernet Powered Pairs Pinout
Quick start proceDure
Demonstration circuits 981A and 981B are easy to set
up to evaluate the performance of the LTC4263. Refer to
Figure 1 for proper measurement equipment setup and
follow the procedure below.
1. Place jumpers in the following positions:
JP1 EN
JP2 EN
JP3 DIS
JP4 AC
JP5 AC
JP6 EN
Autonomous PSE/Daughter Card PSE
implementation, needing only a single 48V supply and a
small number of passive support components. Other op-
tions shown on the DC981A include legacy PD detection
enable, midspan backoff timer enable, power class enforce
mode, and power management enable. An LED for each
port is driven by the respective LTC4263 to indicate the
state of the port.
Design files for this circuit board are available at
http://www.linear.com/demo/DC981A
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
= 25°C
A
CONDITION
Voltage for IEEE802.3af Compliance at Port Output
Midspan Enabled, Failed Detection
Valid IEEE802.3af PD Detection
Power Management Enabled, RPM = 12.4kΩ
Endpoint PSE, Alternative A (MDI)
Midspan PSE, Alternative B
2. Insert daughter card (DC981B) to main board
(DC981A) at polarized connector J3.
3. Apply 48V across VDD48 and VSS.
4. Connect a scope probe at VOUT_MD and VOUT_EP
both referenced to positive rail VDD48.
5. Connect a valid PD to either midspan PSE or
endpoint PSE.
6. Connect a second PD to the open port.
DEMO MANUAL
DC981A/DC981B
Main Board, Single Port
VALUE
46V to 57V
3.2s
17kΩ to 29.7kΩ
17W
1/2(+), 3/6(–)
4/5(+), 7/8 (–)
LTC4263
dc981abf
1