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MX-G68V/MX-G65V
MSM66587 (MIC1) : Microprocessor
1.Pin layout
12_0
P12_1
INT2/P12_2
INT3/P12_3
P12_4
P12_5
P12_6
P12_7
V
DD
*(V
) V
DD
REF
(GND) AGND
(TEST0) AI0
(TEST1) AI1
(TEST2) AI2
(TEST3) AI3
GND
V
DD
ETMCK/P4_0
P4_1
P4_2
P4_3
P4_4
P4_5
P4_6
P4_7
2.Block diagram
16-bit RTO
P2_4/RT08
/PWM
P2_5/RTO9
Timer
P6_2/RXD1
Serial Port
P6_3/TXD1
P6_4/RXC1
P6_5/TXC1
PWM
P7_4/PWM0
V REF
AGND
A to D
AI0
Converter
AI3
P4_0/ETMCK
Event Timer
P6_0/INTO
P6_1/INT1
Interrupt
P12_2/INT2
P12_3/INT3
NMI
P7_3/CLKOUT
Peripheral
1-46
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Control
Registers
SSP
LRB
ALU
ALU Control
*2
ACC
CPU Core
PSW
Memory Control
PC
Pointing R
Local R.
Instruction
Decoder
System Control
P9_6
75
P9_5
74
73
P9_4
72
P9_3/A19
71
P9_2/A18
70
P9_1/A17
69
P9_0/A16
GND
68
V
67
DD
66
P1_7/A15
65
P1_6/A14
64
P1_5/A13
63
P1_4/A12
62
P1_3/A11
P1_2/A10
61
60
P1_1/A9
P1_0/A8
59
P0_7/AD7
58
P0_6/AD6
57
56
P0_5/AD5
55
P0_4/AD4
P0_3/AD3
54
P0_2/AD2
53
P0_1/AD1
52
P0_0/AD0
51
EA
ALE/P5_5
PSEN/P5_4
RD/P7_1
WR/P7_0
RAM
WAIT/P7_2
2 KB
AD0/P0_0
AD7/P0_7
*1
ROM
A8/P1_0
64 KB
A15/P1_7
A16/P9_0
A19/P9_3
Port Control
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