Onkyo HT-R410 Service Manual page 35

IC BLOCK DIAGRAMS AND DESCRIPTIONS
CS493264(DSP IC)
RESET
CMPDAT,
SDATAN2
COMPRESSED
CMPCLK,
DATA INPUT
SCLKN2
INTERFACE
CMPREQ,
LRCLKN2
SCLKN1,
STCCLK2
DIGITAL
AUDIO
LRCLKN1
INPUT
INTERFACE
SDATAN1
CLKIN
CLOCK MANAGER
CLKSEL
FLT2 FLT1
Description
No. Symbol
1 VD1 Digital positive supply
2 DGMD1 Digital supply ground
3 AUDATA3,XMT958 SPDIF transmitter output. Digital audio output.
Host write strobe or host data strobe or external memory write enable or general
4 WR,DS,EMWR,GPIO10
purpose input & output number 10.
Host parallel output enable or host parallel R/W or external memory output
5 RD,R/W,EMOE,GPIO11
enable or general purpose input & output number 11.
6 A1,SCDIN Host address bit one or SPI serial control data input.
7 A0,SCCLK Host parallel address bit zero or serial control port clock.
In parallel host mode these pins provide a bi-directional data bus. If a serial host
8 DATA7
mode is selected, these pins can provide a multiplexed address and data bus for
9 DATA6
connecting an 8-bit external memory. Otherwise, in serial data host mode, these
10 DATA5
pins can act as general-purpose input or output pins that can be individually
11 DATA4
configured by this DSP.
12 VD2 Digital positive supply
13 DGND2 Digital supply ground
In parallel host mode these pins provide a bi-directional data bus. If a serial host
14 DATA3
mode is selected, these pins can provide a multiplexed address and data bus for
15 DATA2
connecting an 8-bit external memory. Otherwise, in serial data host mode, these
16 DATA1
pins can act as general-purpose input or output pins that can be individually
17 DATA0
configured by this DSP.
18 CS Host parallel chip select, host serial SPI chip select pin.
SCDIO,SCDOUT,PSEL Serial control port data input and output, parallel port type
19
,GPIO8
select pin.
20 INREQ,ABOOT Control port interrupt request, automatic boot enable
21 EXTMEM, External memory chip select or general purpose input & output number pin
22 SDATAN1 PCM audio data input number one
23 VD3 Digital positive supply
24 DGND3 Digital supply ground
25 SCLK1,STCLK2 PCM audio data input bit clock
26 LRCLKN1 PCM audio input sample rate clock
CMPDAT,ECV958
27 PCM audio data input number two.
SDATAN2
CMPCLK,
28 PCM audio input bit clock
SCLKN2
CMPREQ
29 PCM audio input sample rate clock
LRCLKN2
30 CLKIN Master clock input pin
31 CLKSEL DSP clock select pin
32 FILT2 Connect to an external filter for phase-locked loop.
33 FILT1 Connect to an external filter for phase-locked loop.
34 VA Analog positive supply.
35 AGND Analog supply ground/
36 RESET Master reset input
37 DD
These pins are reserved and should be pulled up with an external 4.7k resistors.
38 DC
39 AUDATA2 Digital audio output 2.
40 AUDATA1 Digital audio output 1.
41 AUDATA0 Digital audio output 0.
42 LRCLK Audio output sample rate clock
43 SCLK audio output bit clock
44 MCLK Audio master clock
RD,
DATA7:0,
R/W,
EMAD7:0,
EMOE, EMWR,
GPIO7:0
CS
GPIO11 GPIO10
PARALLEL or SERIAL HOST INTERFACE
FRAMER
SHIFTER
DSP PROCESSING
INPUT
BUFFER
CONTROLLER
RAM
PROGRAM
MEMORY
RAM INPUT
BUFFER
ROM
PROGRAM
MEMORY
PLL
VA AGND DGND(3:1)
WR, SCDIO,
DS, SCDOUT,
PSEL, A0, A1, ABOOT,
SCCLK SCDIN INTREQ
GPIO9
24-BIT
RAM
DATA
RAM
MEMORY
OUTPUT
BUFFER
ROM
DATA
MEMORY
STC
VD(3:1)
A0,SCCLK
7
DATA7,EMAD7,GPIO7
8
DATA6,EMAD6,GPIO6
9
DATA5,EMAD5,GPIO5
10
DATA4,EMAD4,GPIO4
11
VD2
12
DGND2
13
DATA3,EMAD3,GPIO3
14
DATA2,EMAD2,GPIO2
15
DATA1,EMAD1,GPIO1
16
DATA0,EMAD0,GPIO0
17
HT-R410
EXTMEM,
GPIO8
DD
DC
MCLK
SCLK
LRCLK
OUTPUT
FORMATTER
AUDATA<2.0>
XMT958/AUDATA3
39
AUDATA2
38
DC
37
DD
36
RESET
35
AGND
34
VA
33
FILT1
32
FILT2
31
CLKSEL
30
CLKIN
29
CMPREQ,LRCLKN2