Hardware Specifications - Casio DT-930 Hardware Manual

7.4.

Hardware Specifications

Table 7.2
Block
Gate Device
Array
No. of bits
Operating frequency
Memory SRAM
EEPRO
M
(MASK
ROM)
I/F I/F to
DT-930
I/F to
Host PC
Continue.
Item
SH7020
32 bits RISC
18.432 MHz
Device SRM2B256SLMX-70
Capacity 32 Kbytes
Access time 70 nsec.
Device M27C1024-10L1
Capacity 128 Kbytes
Access time 100 nsec.
Protocol Original Ir Interface (IrDA device)
Conforms toVer. 1.2
Synchronization Start/Stop bit
Method Half duplex
Data format Data bit : 8
Stop bit : 1
Parity bit : none
Baud rate (bps) 9600, 38.4K, 115.2 K
I/F level Mark : LED off
Space: LED on (pulse width 1.6 usec. approx.)
Usage Connecting DT-930
Protocol RS-232C
Synchronization Start/Stop bit
Method Full duplex/Half duplex
Data format Data length : 8 bits
Stop bit : 1
Parity bit : none
Baud rate (bps) 2400, 4800, 9600, 19.2K, 38.4K, 57.6K, 115.2K
I/F level SD
RD
Connector
(example)
DSUB 9 pin (male)
Pin no. 1
Pin no. 3
Pin no. 5
Pin no. 7
Pin no. 9
Usage (example) PC, Modem, Printer
34
Specification
Mark -15 to –5V
Space +15 to 5 V
Mark -3 V or less
Space +3 V or more
SG FR SD RD CD
5 4 3 2 1
3 2
6
9 8 7 6
CI CS RS D
CD Pin no. 2
SD Pin no. 4
SG Pin no. 6
RS Pin no. 8
CI
Remark
By HITACHI
Built-in
MASKROM is
not used.
2 pcs (16-bit)
Erasable with
ultra-violet light
Use the IC
socket to update
the firmware.
By contact
method only.
Fixed
Bit switch/setting
of IrCOMM
On-pulse width
is fixed
irrespective of
the ransmission
rate.
Bit switch/setting
of IrCOMM
D-sub 9-pin
(male)
connector
RD
ER
D
CS