Synthesizer Operation - Motorola LB3 (42.0 - 50.0MHz) Service Information

2-10 THEORY OF OPERATION
The VCO output is taken from the source and applied to the first buffer transistor (Q1304 receive,
Q1307 transmit). The first buffer output is further amplified by the second buffer transistor (Q1305
Rx, Q1308 Tx) before being applied to the receiver first mixer or transmitter first stage input.
In TX mode the modulation signal coming from the LVFRAC-N synthesizer IC (MODOUT, U1201 pin
41) is superimposed on the DC steering line voltage by capacitive divider C1215, C1208 and
C1212, causing modulation of the TX VCO using the same varactor as used for frequency control.
4.3

Synthesizer Operation

The complete synthesizer subsystem comprises mainly of low voltage LVFRAC-N synthesizer IC,
Reference Oscillator (crystal oscillator with temperature compensation), charge pump circuitry, loop
filter circuitry, and voltage-controlled oscillators and buffers. A sample of the VCO operating signal
PRE_IN is amplified by feedback buffer Q1202, low-pass filtered by L1205, C1222 and C1224, and
fed to U1201 pin 32 (PREIN).
The pre-scaler in the synthesizer (U1201) is basically a dual modulus pre-scaler with selectable
divider ratios. This divider ratio of the pre-scaler is controlled by the loop divider, which in turn
receives its inputs via the serial interface to the microprocessor. The output of the pre-scaler is
applied to the loop divider. The output of the loop divider is connected to the phase detector, which
compares the loop divider´s output signal with the reference signal. The reference signal is
generated by dividing down the signal of the reference oscillator, whose frequency is controlled by
Y1201.
The output signal of the phase detector is a pulsed DC signal which is routed to the charge pump.
The charge pump outputs a current at pin 43 of U1201 (I OUT). The loop filter (which consists of
R1205-6, R1208, C1212-14) transforms this current into a voltage that is applied to the varactor
diodes (CR1310 for transmit, CR1302 for receive) and alters the output frequency of the appropriate
VCO. The current can be set to a value fixed in the LVFRAC-N IC or to a value determined by the
currents flowing into BIAS 1 (U1201-40) or BIAS 2 (U1201-39). The currents are set by the value of
R1211 or R1207 respectively. The selection of the three different bias sources is done by software
programming.
To reduce synthesizer lock time when new frequency data has been loaded into the synthesizer the
magnitude of the loop current is increased by enabling the IADAPT (U1201-45) for a certain
software programmable time (Adapt Mode). The adapt mode timer is started by a low to high
transient of the CSX line. When the synthesizer is within the lock range the current is determined
only by the resistors connected to BIAS 1, BIAS 2, or the internal current source. A settled
synthesizer loop is indicated by a high level of signal LOCK (U1201-4).
In order to modulate the PLL the two spot modulation method is utilized. Via pin 10 (MODIN) on
U1201, the audio signal is applied to both the A/D converter (low frequency path) and the balanced
attenuator (high frequency path). The A/D converter converts the low frequency analog modulating
signal into a digital code that is applied to the loop divider, thereby causing the carrier to deviate.
The balance attenuator is used to adjust the VCO's deviation sensitivity to high frequency
modulating signals. The output of the balance attenuator is present at the MODOUT port (U1201-
41) and superimposed on the VCO steering line voltage by a divider consisting of C1215, C1208
and C1212.