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CMPA
Syntax
Operation
Description
Status Bits
Mode Bits
Example
Example
Compare the 20-bit source with a 20-bit destination register
CMPA
Rsrc,Rdst
CMPA
#imm20,Rdst
(.not. src) + 1 + Rdst
The 20-bit source operand is subtracted from the 20-bit destination CPU
register. This is made by adding the 1's complement of the source + 1 to the
destination register. The result affects only the status bits.
N:
Set if result is negative (src > dst), reset if positive (src <= dst)
Set if result is zero (src = dst), reset otherwise (src ≠ dst)
Z:
C:
Set if there is a carry from the MSB, reset otherwise
V:
Set if the subtraction of a negative source operand from a positive
destination operand delivers a negative result, or if the subtraction of
a positive source operand from a negative destination operand delivers
a positive result, reset otherwise (no overflow).
OSCOFF, CPUOFF, and GIE are not affected.
A 20-bit immediate operand and R6 are compared. If they are equal the
program continues at label EQUAL.
CMPA
#12345h,R6
JEQ
EQUAL
...
The 20-bit values in R5 and R6 are compared. If R5 is greater than (signed) or
equal to R6, the program continues at label GRE.
CMPA
R6,R5
JGE
GRE
...
or Rdst − src
; Compare R6 with 12345h
; R5 = 12345h
; Not equal
; Compare R6 with R5 (R5 − R6)
; R5 >= R6
; R5 < R6
16-Bit MSP430X CPU
Address Instructions
4-163
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