Sharp DV-600S Service Manual page 27

Terminal Terminal name
31 MRST
32 VSS
33 VDD
34 PXDO (0)
35 PXDO (1)
36 PXDO (2)
37 PXDO (3)
38 PXDO (4)
39 PXDO (5)
40 VSS
41 VDD
42 PXDO (6)
43 PXDO (7)
44 PXCLKO
45 VSYNCO
46 HSYNCO
47 VSYNCI
48 VSS
49 VDD
50 HSYNCI
51 PXCLKI
52 PXDI (0)
53 PXDI (1)
54 PXDI (2)
55 PXDI (3)
56 VSS
57 VDD
58 PXDI (4)
59 PXDI (5)
60 PXDI (6)
61 PXDI (7)
62 TEST0
63 TEST1
64 VSS
• Block Diagram
In/Output
Input Reset signal
– Digital GND
– Digital power +3.3V
Output Pixel data output
Output 8-bit parallel video data conforming to ITU-R BT.601 and BT.656 standard (Cb/Y/Cr/Y)
Output MSB=PXDO(7), LSB=PXDO(0)
Output
Output
Output
– Digital GND
– Digital power +3.3V
Output
Output
Output Reference clock output for pixel data. 27 MHz
Output Vertical sync signal output
Output Horizontal sync signal output
Input Vertical sync signal output
– Digital GND
– Digital power +3.3V
Input Horizontal sync signal output
Input Reference clock output for pixel data. 27 MHz
Input Pixel data output
Input 8-bit parallel video data conforming to ITU-R BT.601 and BT.656 standard (Cb/Y/Cr/Y)
Input MSB=PXDI(7), LSB=PXDI(0)
Input
– Digital GND
– Digital power +3.3V
Input
Input
Input
Input
Input Test terminal
Input Test terminal
– Digital GND
12 15 2
18 21 10 11
HADAT HADR
8
Edge
creation
SPT circuit
ITU-R
52 58
Source PXDI
601/656
Dec.
8
55 61 interface
HSYNCI
50
1
VSYNCI
47
1
PXCLKI
Clock
51
Timing
Gen.
1
PXCLKO generation
44
1
64pin LQFP
Function
CPU
7
29 28 27 26 30 31
HCS HAS HWR HRD HIM MRST
8 1 1 1 1 1 1
Host interface
Digital
DR-SPT
dinamic
circuit
r circuit
Digital color correction
Color
White
offset
correction
correction
TEST0
TEST1
ITU-R
601/656
formatter
1 1 8
HSYNCO VSYNCO PXDO
34 39
46 45
42 43
NTSC Enc.
(3ch D/A built in)
11-10
1 9
17 25
VDD
33 41
49 57
8 16
24 32
VSS
40 48
56 64
62
63
INT 22
WAIT 23
DV-600S
DV-600H