Sharp DV-600S Service Manual page 26

DV-600S
DV-600H
11-9. IC507 BR93L46F
Terminal Terminal name
2 VCC
7 GND
3 CS
4 CLK
5 DIN
6 OCNT
• Block Diagram
C S
S K
D I
D O
11-10. IC508 IX1516GE
Terminal Terminal name
1 VDD
2 HADR (0)
3 HADR (1)
4 HADR (2)
5 HADR (3)
6 HADR (4)
7 HADR (5)
8 VSS
9 VDD
10 HADR (6)
11 HADR (7)
12 HADAT (0)
13 HADAT (1)
14 HADAT (2)
15 HADAT (3)
16 VSS
17 VDD
18 HADAT (4)
19 HADAT (5)
20 HADAT (6)
21 HADAT (7)
22 INT
23 WAIT
24 VSS
25 VDD
26 HRD
27 HWR
28 HAS
29 HCS
30 HIM
EEPROM
In/Output
– Power
– All input/output reference voltage, 0V
Input Tip select input
Input Sirial clock input
Input Start bit, operation code, address and serial data input
Output Serial data output, READY/BUSY internal status indication output
Instruction decode control
clock generation
Address
Instruction
buffer
register
Data
resistor
Dummy bit
GAMMA S-P-TONE
In/Output
– Digitan power +3.3V
Input CPU Address bus
Input CPU Address bus
Input CPU Address bus
Input CPU Address bus
Input CPU Address bus
Input CPU Address bus
– Digital GND
– Digitan power +3.3V
Input CPU Address bus
Input CPU Address bus
Input CPU Data bus
Input CPU Data bus
Input CPU Data bus
Input CPU Data bus
– Digital GND
– Digitan power +3.3V
Input CPU Data bus
Input CPU Data bus
Input CPU Data bus
Input CPU Data bus
Input CPU Data bus
Input CPU Data bus
– Digital GND
– Digitan power +3.3V
Input CPU read signal
Input CPU write signal
Input CPU address strobe signal
Input CPU tip select signal
Input CPU bus control selection signal (I/M mode = H/L)
Function
Wave voltage
detection
Write
High voltage
inhibition
generation
Address
6bit
6bit
Decoder
R/W
16bit
Amp. 16bit
Function
11-9
1,024
bit
EEPROM
Aray