Block Diagram Video - Philips 42PF9731D Service Manual

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Video

VIDEO
B2B MAIN TUNER + OOB TUNER B3 MPIF MAIN:
1T04
TD1336O
12 IF-TER2 IF-TER2
IF-OUT
OOB
OOB
7T41
MAIN HYBRID
1T41 UPC3218GV
TUNER
14 1 7 3 6
IF-1
CVBS-TER-OUT
15 14 8 2 7
IF-2
in out B3f
5 13 SAW 44MHz
AGC COTROL
B2A
CHANNEL
DECODER
7TG0
NXT2003 52 50
CVBSOUTIF-MAIN
DTV CABLE AND
TERRESTRIAL
53 AUX-IF-AGC-MAIN AV1_CVBS
RECEIVER
N.C.
FAT-ADC-INP-MAIN
9
QAM 8VSB
FAT-ADC-INN-MAIN
ADC ADC 10
Demodulator
7T43
FEC UPC3220GR
1T41 AV2_Y-CVBS
AGC
MIX 7
B3f
15 1
IN OUT
119 1 AV2_C
Micro- I2C TUNER AGC 16 14
8 B3f
GPIO
120
Controller
FRONT_Y-CVBS
CATV
35 FS-OUTP B3f
5
OUT OF BAND
FRONT_C
36 FS-OUTN
6 TUNER B3f
AMP
AMP
FDC-ADC-INP 12
28 10 OUT IN AV7_Y-CVBS
QPSK
B2f
ADC 29 FDC-ADC-INN 9 IF
13
Demodulator
AV7_C
B3f
AV1-AV5-AV6_R-PR
B7a
MPEG_DATA
63 64 AV1-AV5-AV6_G-Y
B7a
B10B
AV1-AV5-AV6_B-PB
B7a
7P13
MUX AV2-AV4_R-PR
B3f
B10A B10C AV2-AV4_G-Y
BUFFERING
7P03
B3f
POD STV0701
AV2-AV4_B-PB
B3f
FE-DATA
COMMON
CRX-POD-A(8)
INTERFACE
DRX-POD-(9) HARDWARE
7P76
CONTROLLER
7P77
B7A HDMI
11
POD BUFFER DV1F
12
To
DV1of VIPER
POD DATA
B5C
HDMI
CONNECTOR
HDMI
CONNECTOR
AV1-AV6_FBL-HSYNC
B3f
AV6_VSYNC
B3f
AV2-AV4_G-Y
B3f
AV1-AV5-AV6_G-Y
B3f
AV2-AV4_R-PR
B3f
AV1-AV5-AV6_R-PR
B3f
AV2-AV4_G-Y
B3f
AV1-AV5-AV6_G-Y
B3f
AV2-AV4_B-PB
B3f
AV1-AV5-AV6_B-PB
B3f
B3F
MPIF MAIN: CONNECTION A
AV2-AV4_R-PR
B3a,B7b
AV2-AV4_G-Y
B3a,B7b
AV2-AV4_B_PB
B3a,B7b
AV2-FBL
B4a
AV2_C
B3a
B3a AV2_Y-CVBS
Y-CVBS-MON-OUT
B3b
C-MON-OUT
B5c
AV2-STATUS
B4e
N.C REGIMBEAU-AV6-VSYNC
B4A,B7a AV6_VSYNC
N.C AV1_CVBS-AV7-Y-CVBS
B3a AV7_Y-CVBS
AV1-STATUS-AV7-C
N.C
AV7_C
B3a
CVBS-TER-OUT
B3a
B3a FRONT_Y-CVBS
FRONT_C
B3a
B3G MPIF MAIN: CONNECTIONS B
AV1-AV5-AV6_R-PR
B3a,B7b
AV1-AV5-AV6_G-Y
B3a,B7b
AV1-AV5-AV6_B-PB
B3a,B7b
AV1-AV6_FBL-HSYNC
B7b
AV6_VSYNC
B7b
BJ2.4U/BJ2.5U LA 6.
7C00
PNX3000HL
B3C IF
1C52
7 107 VIFINP
SOUND GROUP
2
LPF
TRAP DELAY
8 108 VIFINN
SUPPLY
QSS
QSSOUT
99 SIFINP
BPF
7C56-1 LPF
DIGITAL
EF 3C71
100 SIFINN
1 2
BLOCK
TO AM INTERNAL
LPF AUDIO SWITCH
7C56-2
EF 3C73
CVBSOUTIF
4 5 120
B3A CVBS-OUTA
SOURCE SELECTION CVBS/Y RIM LPF
CVBS-OUTB
C L A M P
C-PRIM
123
CVBS-IF
MPIF
126
CVBS1
1 CVBS2
12 CVBS_DTV
STROBE1N 60
A
+
DATA STROBE1P 61
4 CVBS|Y3 D
LPF
LINK
1 DATA1N 62
5 C3
Yyuv
2FH
DATA1P 63
8 CVBS|Y4
9 C4
STROBE3N
LPF
15 Y_COMB A STROBE3P
DATA
C L A M P
LINK
D
16 C_COMB DATA3N
3
2nd
SIF DATA3P
25 R|PR|V_1 A/D
CVBS SEC
YUV Yyuv
26 G|Y|Y_1 2Fh
RGB
Yyuv A
STROBE2N
LEVEL
27 B|PB|U_1
D
ADAPT
U U,V DATA STROBE2P
CLAMP
INV.
30 R|PR|V_2
A LINK
PAL DATA2N
V 2
D
31 G|Y|Y_2
DATA2P
MONO SEC.
32 B|PB|U_2
CLP PRIM
TIMING
CLP SEC
CIRCUIT
CLP yuv
B7B HDMI: I/O + CONTROL
7B11
TDA9975
1B01
1
ARX2+ 1B33 PARX2+
RX2+A
3 ARX2- PARX2-
RX2-A
HDMI
4 ARX1+ 1B32 PARX1+
RX1+A
6 Termination
ARX1- PARX1-
RX1-A Video
resistance
7 ARX0+ 1B31 PARX0+ output
RX0+A control
formatter
9 ARX0- PARX0-
RX0-A
10
ARXC+ 1B30 PARXC+
RXC+A
12
ARXC- PARXC-
RXC-1
15
ARX-DCC-SCL
16
ARX-DCC-SDA
19 7B30
ARX-HOTPLUG
VSYNC-HIRATE
1B02 B5A
VHREF
1 BRX2+ PBRX2+
1B33
RX2+B
timing
Upsample
3 BRX2- PBRX2-
generator
RX2-B
4
BRX1+ 1B32 PBRX1+
RX1+B Derepeater
Termination
6 BRX1- PBRX1-
RX2-B resistance
7
BRX0+ 1B31 PBRX0+
control
RX0+B
9 BRX0- PBRX0- HDMI
HDCP
RX0-B
receiver
10 BRXC+ PBRXC+
1B30
RXC+B
12 I2C slave
BRXC- PBRXC-
RXC-B
interface
15
BRX-DCC-SCL BRX-DCC-SCL
HSCL B
16 BRX-DCC-SDA
BRX-DCC-SDA
HSDA B
M135-CLK
19 7B31
BRX-HOTPLUG Line time
measuremebt
VSYNC-HIRATE
B5A
Activity
R16
HSYNC Sync
detection &
M16
seperator
VSYNC sync selec.
T12
R12 SOG
Slicers
Clocks
T14 generator
R/PR
R14
T9 ADC
R9 G/Y
T7
R9 B/PB
BE2
EXTERNALS B
1M36
1E40 1E40
7A20
2
FRONT_Y-CVBS
1
7A21 EF 1 AV2-AV4_R-PR
FRONT_C 4
BE1
2 2 AV2-AV4_G-Y
EF
BE1
EF 3 3 AV2-AV4_B-PB
BE1
4 4
N.C.
6 6 AV2_C
BE1
7 7
AV2_Y-CVBS
BE1
9 9 Y-CVBS-MON-OUT
BE1
10 10
N.C.
11 11 N.C.
12 12 AV6_VSYNC
BE1
22 22 AV7_Y-CVBS
BE1
23 23
AV7_C
BE1
25 25
N.C.
33 33
FRONT_Y-CVBS
34 34
FRONT_C
1E62
1E62
7A01
1 1
7A02 EF AV1-AV5-AV6_R-PR
BE1
EF 2 2 AV1-AV5-AV6_G-Y
BE1
EF 3 3 AV1-AV5-AV6_B-PB
BE1
5 5 AV1-AV6_FBL-HSYNC
BE1
6 6 N.C.
46
B4 PNX2015:
7J00
PNX2015E
B4C TUNNELBUS
PNX2015
14
+5VMPIF
28
35
SCL-DMA-BUS2 North tunnel
46
40 SDA-DMA-BUS2
19
N.C.
B4A AUDIO/VIDEO
22
N.C.
Memory
based scaler
STROBE1N-MAIN R4
AVP1_DLK1SN
STROBE1P-MAIN R3 AVIP-1
AVP1_DLK1SP
DATA1N-MAIN R2
AVP1_DLK1DN
R1
DATA1P-MAIN
AVP1_DLK1DP
50 STROBE3N-MAIN
N4 AVP1_DLK3SN
COLUMBUS
51 STROBE3P-MAIN
N3 AVP1_DLK3SP
3D Comb
52 DATA3N-MAIN N2 filter and
AVP1_DLK3DN
noice
53 DATA3P-MAIN N1
AVP1_DLK3DP reduction
55 STROBE2N-MAIN P4 AVP1_DLK2SN
56 AVIP-2
STROBE2P-MAIN P3 AVP1_DLK2SP
57 DATA2N-MAIN
P2 AVP1_DLK2DN
123 DATA2P-MAIN P1
AVP1_DLK2DP
46 HV-PRM-MAIN M3
AVP1_HVINFO1
40 M4
CLK-MPIF
MPIF_CLK
AV2_FBL L2 Video MPEG
AVP2_HSYNCFBL2
B3f
decoder
AV6_VSYNC G2
AVP2_VSYNC2
B3f
B4B DV I/O INTERFACE
DV4_DATA_0 T0 9
DV4-DATA
VIP
DV5-DATA
DV5_DATA_0 T0 9
D1 DV4-CLK
AK8
DV-HREF AH9
A2
DV-HREF
A1 DV-VREF AJ9
DV-VREF
C2 DV-FREF AK9
DV-FREF
L16 SDA-MM-BUS1
L15
SCL-MM-BUS1
B4E
STANDBY
7LA7
M25P05
B5B VIPER: MAIN MEMORY
B4D
DDR INTERFACE
512K STANDBY
5 SPI-SDO AK10
PROCESSOR
FLASH
6 SPI-CLK AH10
1 SPI-CSB AG10
See
3 SPI-WP AJ27
Block digram
Control
D BE1
SIDE I/O EXTERNALS A
1M36
2 Y 1020
4
C
AV6_VSYNC
V
1001
AV1-AV6_FBL-HSYNC
H
Y/CVBS
AV7_Y-CVBS
VIDEO
VIDEO
1002
1
3 1070
C 1
S VIDEO 5
3
4
EXT1 S VIDEO 5
2
4
2
+8V
1030
7010
PR/R
AV1-AV5-AV6_R-PR
Y/G 7012
AV1-AV5-AV6_G-Y
7011
PB/B
AV1-AV5-AV6_B-PB
B5 VIPER:
7V00
PNX8550
B5C B5B
TUNNELBUS DDR INTERFACE
VIPER
MM_DATA
TUN-VIPER-RX-DATA
Tunnel Memory
South tunnel
controller
TUN-VIPER-TX-DATA
MM_A(0-12)
B5C
DVD
AUDIO/VIDEO CSS
2D DE
2-Layer
AG28
secondary DAC-CVBS
VO-2
video out
AD28 DV1F-CLK AH16
DV1_CLK
Dual SD AJ30
AF30 DV2A-CLK AH19 Temporal
DV2_CLK single HD
noise redux
DV3F-CLK AD27 VSYNC-HIRATE
AK28 AG25 MPE2 decoder
DV3_CLK
AE28 HSYNC-HIRATE
From
250Mhz
B10C
MIPS32
POD
CPU
Scaler and
de-interlacer
MUX
DV1_DATA(0-9) DV1F-DATA 0 TO 7 DV-ROUT(0-9)
1SD+1HD
YUV
5 Layer
Video Video in
primary DV-GOUT(0-9)
TS
DV2_DATA(0-9) DV2A-DATA 0 TO 7 video out
router
HD/VGA/
Dual
656
con
DV-BOUT(0-9)
acces
DV3_DATA(0-9) DV3F-DATA 0 TO 7
G26
B6B
PACIFIC3: PART2
MP-OUT-FFIELD DV-OUT-FFIELD
J27
RGB_UD
J29 MP-OUT-HS MP-HS
RGB_HSYNC
MP-OUT-VS
J28 MP-VS
RGB_VSYNC
J30 MP-CLKOUT MP-CLK
RGB_CLK_IN
VO-1
MP-OUT-DE
K26 MP-DE
RGB_DE
RIN (0-9) MP-ROUT MP-R(0-9)
GIN (0-9) MP-GOUT MP-G(0-9)
BIN (0-9) MP-BOUT MP-B(0-9)
LVDS_TX
TXPNXA-
B26
LVDS_AN
C26 TXPNXA+
LVDS_AP
TXPNXB-
A25
LVDS_BN
B25 TXPNXB+
LVDS_BP
D25 TXPNXC-
LVDS_CN
E25 TXPNXC+
LVDS_CP
C23 TXPNXCLK-
LVDS_CLKN
D23 TXPNXCLK+
LVDS_CLKP
B24 TXPNXD-
LVDS_DN
C24 TXPNXD+
LVDS_DP
E24 TXPNXE-
LVDS_EN
TXPNXE+
F24
LVDS_EP
7L50
K4D261638F
PMX-MA(0-12) PMX-MA
DDR
Memory
PNX-MDATA SDRAM
PNX-MDATA
controller
(0-15)
16Mx16
A17 PNX-MCLK-P 45
MCLK_P
A16 PNX-MCLK-N 46
MCLK_N
1060
AV2_Y-CVBS
BE2
VIDEO
BE2
BE2
EXT2
BE2 1080
1
3
AV2_C
S VIDEO 5
BE2
4
2
AV7_C
BE2
+8V
1050
7000
PR/R
AV2-AV4_R-PR
BE2 BE2
Y/G 7002
EXT3
AV2-AV4_G-Y
BE2
BE2
7001
PB/B
AV2-AV4_B-PB
BE2
BE2
B5B VIPER: MAIN MEMORY
7V01
K4D551638F
DDR
SDRAM 1
7V02
K4D551638F
DDR
SDRAM 2
B3B
7C32
EF
Y-CVBS-MON-OUT
B3f
C-MON-OUT
B3f
B7A
BE
B6B PACIFIC3: PART2
7G04
T6TF4AFG-0003
PACIFIC 3
PICTURE ENHANCEMENT
116
115
109
114
B4G PNX2015: DISPLAY INTERFACE
1G50
12
5J50
13
15
5J52
16
18
5J54
LVDS
19
CONNECTOR
TO SCREEN
21
5J56
22
24
5J58
25
27
5J60
28
1
VDISP
2
3
4
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