Dcu (Data Capturing Unit); Demdec (Demodulator And Decoder); Audio Processing; Itu656 Formatter Block Diagram - Philips 42PF9731D Service Manual

EN 164 9. BJ2.4U/BJ2.5U LA

DCU (Data Capturing Unit)

Data Capture Unit
I2d Data_1
(cvbs)
Decimator Data Slicer
I2d Data_2
(Y)
H/V Sync
Acquisition
Timing
Field Id
Figure 9-21 DCU block diagram
The purpose of this block is to acquire digital data (containing
Teletext, Closed Captions, ...) from a CVBS/Y/C video input
source. It performs processing on the received data and
provides the data to the ITU-656 formatter unit.
The decimator reduces the sample rate (from 27 MHz to 13.5
MHz) of the incoming digitized CVBS or Y data stream from the
2
I D receiver. From the video input, the data slicer reconstructs
the transmitted bit stream and associated clock. The SERPAR
block converts the serial bits, coming from the data slicer, into
parallel bytes. The packet processor performs data decoding
and some error correction, assembles received bytes into
packet structure, and streams out the data to the ITU-656
formatter.
The acquisition-timing block locks onto sync signals, and
provides timing information to the other blocks of the data
capture unit.
ITU656 Output Formatter
ITU656 Formatter
YUV
Video Data
Processing
VBI data
VBI Data
packets
Processing
Figure 9-22 ITU656 formatter block diagram
The ITU656 formatter gets YUV data as video input signal,
coming from the VIDDEC block. These YUV data are either
decoded CVBS signals, matrixed RGB signals, or YUV input
signals. The second input data are VBI sliced data coming from
the DCU. The output of the ITU delivers a data stream, which
is ITU-601/656/1364 compliant, and includes video as well as
the VBI data.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
Packet
VBI data
SERPAR
packets
Formatter
E_14700_072.eps
310505
ITU_out (9:0)
SERPAR
ITU_Clk
ITU_DATA_VALID
E_14700_073.eps
310505

DEMDEC (Demodulator and Decoder)

f
pilot
MPX
demod.
SAP / EIAJ
demod.
fs = 27 MHz
FM / AM
decimation demod.
SIF
ch. 1
down
mixer
FM / AM
decimation demod.
ch. 2
FM ident
f f
1 2
noise
detector
NICAM
demod. &
decoder
ADC1,2, PIPMONO, Ext. AM
hardware
control &
status reg.
Figure 9-23 DEMDEC block diagram
The demodulator and decoder (DEMDEC) is responsible for
demodulating and decoding incoming SIF signals.
The main features of the DEMDEC are:
• Auto Standard Detection (ASD).
• DQPSK demodulation for different standards,
simultaneously with 1-channel demodulation.
• NICAM decoding (B/G, I, D/K, and L standard).
• Two-carrier multi standard FM demod. (B/G, D/K and M).
• Optional AM demodulation for system L, simultaneously
with NICAM.
• Identification A2 systems (B/G, D/K and M standard) with
different identification time constants.
• FM pilot carrier present detector.
• BTSC MPX decoder.
• SAP decoder.
• dBx noise reduction.
• Japan (EIAJ) decoder.
• FM radio decoder.

Audio Processing

6
I2S IN 1 to 6
ADC (L/A, R/B)
PIPMONO
DEC (L/A,R/B, Mono, SAP)
L,R (M,ST, 5.1)
L,R,C,Ls,Rs (DPL II)
AVL
L,R
L,R (DPL II)
®
DPL II Contr.
5
L,R (M,ST, 5.1)
VIRT
L,R
L,R VIRT
VDS
®
C IN
522,523
S/Ls IN
®
VDD
Rs IN
C VIRT
522,523
C
C (DPL II)
MSel
C IN
C Hall/Matrix
(L+R)/2
Hall/
Ls,Rs (DPL II)
S,Ls
Matrix
S/Ls IN
Rs IN Rs
MSel
S Hall (L+R)/2
S Matrix (L-R)/2
Noise/
Silence
AUX1/ HP
Gen.
AUX2,3,4,5,6
5 equal channels for I 2 S, DAC1, DAC2
Audio Monitor
Figure 9-24 Audio processing block diagram
Main features are:
• Master volume control and Balance.
• Tone control (Loudness, Bass, Treble, Equalizer).
• Dolby ProLogic delay.
• Incredible Mono and Stereo.
• Virtual Dolby Surround (VDS 522, 523).
• Virtual Dolby Digital (VDD 522, 523).
• Digital audio I/O interface (stereo I2S input interface).
• Eight audio DACs for six channel loudspeaker outputs and
stereo headphones output.
• Audio DACs for stereo SCART output and stereo LINE
output.
• Serial data link interface for interfacing with the analog
multi-purpose interface IC PNX3000 (MPIF).
DEMDEC DSP
2
2
pre-process
SRC
decimation
filters,
5 channels
deemph.,
dbx,
2
select
4
DDEP (DemDec Easy Programming)
control / status registers (XMEM)
E_14700_074.eps
(L+R)/2
MAIN
MAIN L,R
Ba/Tr SM
+
or EQ
Loudn.
or
Beeper
BBE ®
C
SUB
C
Ba/Tr
SM
or EQ
Loudn.
Ls C
+
Ls/Rs
SM
Ba/Tr
Rs
or EQ
Ls
SM I 2 S1L,R OUT
LFE
Level
Rs
Adj.
SM
I 2 S6L,R OUT
AUX1 AUX1 AUX1
+
Vol/Trim
Ba/Tr SM
AUXx AUXx
Vol/Trim SM
E_14700_075.eps
DEC L/A
DEC R/B
MONO
SAP
PIPMONO
ADC
300505
DAFO1
DAFO2
DAFO3
DAFO4
DAFO5
DAFO6
DAFO7
DAFO8
to
DAC1
L,R
DAC2
L,R
250505