Vip (Video Input Processor); Mbs (Memory Based Scaler); Qtnr (Quality Temporal Noise Reduction And Video Measurement); Qvcp (Quality Video Composition Processor) - Philips 42PF9731D Service Manual

Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.13.2 Block Diagram
2x225 MHz, 32-bit wide DDR
PNX8550
656
VIP1
DV1 656/TS
656
VIP2
DV2* 656/TS
TS
MSP1
DV3 656/TS
TS
MSP2
2
I S audio
AI1-2
SPDIF audio
SPDI 1-2
UART1-2
Remote Control
misc. I/O,
Gen. Purpose I/O
16
timers/
USB host i/f (2 port)
counters,
Smartcard1-2
semaphores
2
I C (4x)
27 MHz
boot, reset, clock
xtal
bound. scan
JTAG
TM-DBG (2x)
2xTM3260 Media Processor
5 issue, 240 MHz
64 kB
16 kB 2-port
128 32-bit regs
(includes NAND/nor flash, IDE drive and 68k peripheral capability)
Figure 9-27 VIPER 2 internal block diagram
Control
An embedded MIPS32 processor (PR4450) running at 266
MHz is available to run the Operating System. The PR4450
processor is primarily responsible for running the demand
paged graphics-intensive operating system, while the TM3260
media processors are responsible for running all real-time
media functions. All hardware resources inside the PNX8550
are accessible by both the MIPS processor and the TM3260
CPUs. A "'sandbox" style system protection provision ensures
that selected MIPS memory regions and critical peripherals
cannot be corrupted or inspected.

VIP (Video Input Processor)

The Video Input Processors (VIP) handles incoming digital
video and processes it for use by other components of the
PNX8550. It provides the following functions:
• Receives 10-bit YUV4:2:2 digital video data from the
selected DVx video port (input signal coming from the AVIP
or Columbus IC output). The data is dithered down to in-
memory 8-bit data format.
• Performs horizontal down scaling or up scaling by 2x (not
available in HD video capture mode).
• Provides an internal Test Pattern Generator with NTSC,
PAL, and variable format support.
• Acquire VBI data using a separate acquisition window from
the video acquisition window.
• ANC header decoding or window mode for VBI data
extraction.
• Interrupt generation for VBI or video written to memory
input mode.
• Color space conversion (mutual exclusive with horizontal
scaling).
• Raw data mode captures of 8- or 10-bit data.

MBS (Memory Based Scaler)

The PNX8550 contains a Memory Based Scaler that performs
operation on images in main memory. The MBS can either be
controlled task by task by a TM3260, or it can be given a list of
Optional external coprocessors
including video enhancement chip
Peak rate: 12bit/cycle each way
MMI
Tunnel
MBS2
V Peaking
TS_OUT
QVCP5L_OUT
656/HD/VGA
30
QVCP1
10
QVCP2L_OUT
656
analog Y/C,cvbs
QVCP2 DENC
2
I S audio
8 ch + 8 ch
AO1-2
SPDIF audio
SPDO
TSDMA
MBS
QTNR
VMPG
(1 HD or 2 SD)
VLD2
DE (2D)
DVD-CSS
E-DMA
PR4450 MIPS CPU
250 MHz
EJTAG debug
16 kB
16 kB
MMU
PCI
33 MHz, 32-bit PCI 2.2
E_14700_076.eps
de-interlacing and scaling tasks. It reads images from memory,
performs a transformation, and writes the result back in
memory.
The MBS main features are:
• De-interlacing using either a median, 2-field majority
select, or 3-field majority select algorithm with an edge
detect/correct post-pass (these three provide increasing
quality, at expense of increased bandwidth).
• Edge detect/correct on an input frame that has been
software de-interlaced (this provides future capabilities in
case we develop a better core de-interlacer than 3-field
majority select).
• Horizontal and vertical scaling (on the input image, or on
the result of edge detect/correct stage).
• Linear and non-linear aspect ratio conversion.
• Anti-flicker filtering.
• Conversions from any input pixel format to any non-
indexed pixel format, including conversions between 4:2:0,
4:2:2 and 4:4:4, indexed to true color conversion, color
expansion / compression, de-planarisation / planarisation
(to convert between planar and packed pixel formats),
programmable color space conversion.
Supported video measurement functions during scaling or de-
interlacing pass:
• Gather a histogram of luminance values (this data is used
by software to control histogram modification).
• Measure noise level inside a rectangular window.
• Measure the lowest level luminance within a rectangular
window (used to control black stretch in QVCP).
• Measure UV bandwidth inside a rectangular window.
091104
QTNR (Quality Temporal Noise Reduction and Video
Measurement)
The QTNR block has two primary functions: Temporal Noise
Reduction: reading two video fields from memory, "current"
(noisy) and "previous" (noise reduced) and producing a noise-
reduced version of "current" in memory. While doing this, or as
a separate "measurement only" pass, perform video
measurements:
• Gather a histogram of luminance values (this data is used
by software to control histogram modification).
• Measure noise level inside a rectangular window.
• Measure the lowest level luminance within a rectangular
window (used to control black stretch in QVCP).
• Measure UV bandwidth inside a rectangular window.
• Measure the position of top and bottom black bars in the
image.

QVCP (Quality Video Composition Processor)

The PNX8550 contains two QVCPs, which are responsible for
combining and displaying video and graphics images from
main memory. The primary QVCP serves as the main display
pipeline, the second one is targeted to be connected to a record
device (VCR). The primary QVCP allows composition of up to
five layers, and can output in ITU-656/HD/VGA format in 10 bits
per component up to 81 Mpix/s.
The secondary QVCP allows composition of up to two layers,
can output in 656 10-bit component mode up to 81 MHz (40.5
Mpix/s). The secondary QVCP is connected to an on-chip
Digital Video Encoder (DENC), allowing direct analog CVBS or
S-video output.
In analog output mode, standard definition interlaced NTSC or
PAL is supported (SCART2-out signal, for VCR-recording).
The encoder has two DACs. DAC1 provides CVBS or
luminance for S-video. DAC2 provides chrominance for S-
video.
Internal sensors allow software to test loading on the S-video
Chrominance line to decide whether to output luminance or
CVBS on DAC1.
BJ2.4U/BJ2.5U LA 9. EN 167