Signal Process Block Diagram - Sony DVP-CX860 Service Manual

3-3. SIGNAL PROCESS BLOCK DIAGRAM

IC302 qj(DVD PLAY)
IC302
ARP
40ns/div
1.2Vp-p
RF 17
RFIN 1
19
RFIN 2
TO 1/3
SD0
97
IC302 ql(CD PLAY)
98
100
(SEE PAGE
3-4) 105
SD7
1.4Vp-p
0.2µs/div
3
MDS0
MD 49 MDS0
SDCK 91
MDP0
52
MDP0
TO 1/3 XSHD 93
LOCK
58
LOCK
XSRQ 94
XSAK
95
SDEF 96
4
CDDOUT
CD 110
DOUT
(SEE PAGE
CDDATA
107 DATA
TO 2/3
3-6)
CDBCK
BCK
108
CDLRCK
109 LRCK
MA0 136
139
140
144
147
MA9
148
154
MD0
157
159
162
164
167
169
MD15
172
XRAS 151
XCAS 150
148
XMWR
152
XOE
A0 73
76
79
A7 82
D0 63
68
70
D7
71
IC301 XRD 61
20 VDDA1
XWR 60
29
VDDA2
+5V 5 3.3V REG 4
32
VDDA3
XCS
84
40 VDDA4
XINT 83
86
XWAIT
XRST 87
123
SCKI
121
MCLK
IC302 <zxc
16
MB-94 BOARD (2/3)
(SEE PAGE 4-13,15,17,19)
IC502 i;
IC502 uj
1.2Vp-p
H
850mVp-p
H
8
SDI0-7
IC502 yh
700mVp-p
H
SDCK
XSHD
XSRQ
XSAK
SDEF
IC504,IC505
SD RAM
IC303
DRAM
21
A0
24
21 M0
27
SDAD0-11
24
10 32
MA0-9
20
27
A11 19
32 A9
2
DQ0
3
5
2 6
I/O0
8
5
9
7
11
SDDT0-15
16 12
MD0-15 10
39
41
40
42
44
43
46 45
46
I/ O15
49
48
49
DQ15
RAS SDDQM0
18 RAS DQML 14
CAS SDDQM1
34 36
UCAS DQMU
WR SDWE
15
35 LCAS WE
OE SDCAS
17 WE 16
CAS
SDRAS
33 OE 17
RAS
SDRCK
CLK 35
SDCKE
34
CKE
SDCS0
18
CS0
SDCS1
CS1 18
HA0-7
8
IC506
6 4
HD8-15 +3.3V
VREG
8
IC503
RD
WRH
6 4
+5V
VREG
XARPCS
ARINT
ARPWT
ARPRST
33MARP
5
(SEE PAGE 3-7)
TO 3/3
ARP
4.4Vp-p
33 MHz
3-5
IC502 uf
IC502
(1/2)
AVDEC
1.0Vp-p
H
6
VIDEO V
COMPOUT
80
VIDEO C
IC502 yl
COUT 77
VIDEO Y
31 DTI0 YOUT 74
Y/G
GOUT 69
34
Cb/R
63
ROUT/B-Y
36 H
Cr/B
BOUT/B-Y 66
39 DTI7
IC701
41 ICLKI
DD
44 ISTARTI
a a
46 IREQO
14 160
ACH12 DSP1CH12I CH780
b b
45 IVALI ACH34 DSP1CH34I
15 159 CH120
c c
43 IERRI
ACH56 16 158 DSP1CH56I CH340
d d
BCKO 19 DSP1BCKI CH560
147
e e
134 SDAD0 LRCKO 18 161 DSP1LRCKI BCKO
131
LRCKO
128
125
124
a
56 DSP2CH12I CH780
127
12
b
130 57 DSP2CH34I CH120
133 c
58 DSP2CH56I CH340
X3VRST
136
d
69 DSP2BCKI CH560
139
TO 3/3
e
137 55 DSP2LRCKI BCKO
(SEE PAGE
140 SDAD11
LRCKO
3-7)
SDDQ0
177
174
119 140
TDO TDI
171
TMS 121 141 TMS
168 SH_SOO
X3VRST
165 TRST 122 142 TRST
SH_SII
163
143
TCK 120 TCK
SH_CLKI
160
16
DO 20 45 DSP2D0
SH_CSNI
158
CX860
157
CMD_REQ
159
CMD_ACK
10 DSP1DII
162
CDDOUT
164 SCLKI
22 32
CDIN2I DSP2DII
167 CDDATA
RESETIN
CDIN1I
23
170
CDBCK
CDBCKI 25
173
CDLRCK
176 SDDQ15 CDLRKI 26
DSP1ACKI
155 SDDQM0
DSP2ACKI
154 SDDQM1 4
DSP1DIACK
152 SDWE08
DSP2DIACK
151 SDCAS08
CD
147 SARAS08
TO 2/3
149 SDCLKO
(SEE PAGE
146 SDCKEO
IC601
3-5)
144 SDCS08
VGA
RSTB 231
143
SDCS18
102 47
PDO0 YCIN0
44
105
PDO0-7
107 41
110 37 YCIN7
181 PDO7
AVDD_06
184 AVDD_07
187 15
AVDD_08 PDI0 100 YCOUT0
97 17
PDI0-7
64 AVDD_00
95 19
67
23
PDI7 92 YCOUT7
70
75
FILD
78 FLDO 87 13
81 HSYNCO 88 1 HSYNC
AVDD_05
83
NRSDOUT 112 2 NRSDIN
NRSEUB 113 3 SCS
D1CLKO 60 5 CK27
MRST
8 SCLK
+1.8V
VIDEO V
VIDEO C
VIDEO Y
IC502 yd
Y/G
Cb/R
1.0Vp-p
700mVp-p Cr/B
H
POFF
5
CX860
WIDE
CX870D
2CH_DATA
1 a
165
2 a 6CH_FRONT
168
3 6CH_REAR
b
167
4 c 6CH_C/SW
166
5 d BCK
173
6 LRCK
e
174
6CH_FRONT
6CH_BCK
1
51
6CH_LRCK
2
48 IC701 rl
3
49
6CH_REAR
4
50
5
KCS/6CH_C/SW
43
4.1Vp-p
6 22.579 MHz
44 CX870D
SI1
119
SO1
117
SC1
115
2CH_CS
KCS/39CS
118
CMDRE0
AURST
108
39INT
6CH/VES_CS
107 IC701 ws
27M39
512FS_6CH
22
XRST
6 512FS2H/VES
MAMUTE
4.7Vp-p
27 MHz
149
67
8
11
512FS39
34
6
XRST
(2/2)
IC502
AVDEC
218 HAD0
215
213
210
208
HA0-21
205
ACLK 12
22 203
29
CRPCLKI
200
198
195
HIREQO 223
193
HAD21 224
192 HWAITOB
232 HD0
DMACK0 228
235
DMACK1 226
237
DMREQ0 229
240
HD0-15
227
DMREQ1
2
XRST 16
11 5
7
10 HD15
HAD22 191
CX870D
HAD23 190
RD
220 HCSB
SCLKIN 182
WRH
221 HWRB
CLKI 180
3-6
DVP-CX860/CX870D
CN502
1.3 CN102-1.3
CN102-26
26
CN102-22
22
CN102-18
18
TO AI BOARD
CN102-6
6
9 CN102-9 (SEE PAGE 3-9)
CN102-5
5
2 CN102-2
10 CN102-10
CN702
28 CN201-28
16 CN201-16
CN201-14
14
12 CN201-12
10.26 CN201-10.26
24 CN201-24
CN201-17
17
CN201-9
9
CN201-23
23
19
CN201-19
21 CN201-21
TO AI BOARD
SI1 (SEE PAGE 3-11)
8 CN201-8
SO1
6
CN201-6
SC1
5 CN201-5
4
CN201-4
27 CN201-27
25 CN201-25
13 CN201-13
20 CN201-20
3 CN201-3
SPDIF
1 CN201-1
AU TO 3/3
(SEE PAGE 3-7)
DD TO 3/3
IC502 qs
4.7Vp-p
24.576 MHz
5/2FSAVD
33MAVD
IC502 wl
AVINT
AVWT
4.6Vp-p
33 MHz
DACK0
DACK1
IC502 <z,x
DREQ0
DREQ1
4.7Vp-p
27 MHz
XAVDCS3
XAVDCS2
(SEE PAGE
27MAVD
3-7)
11
TO 3/3
AVD
(SEE PAGE
40
TO 3/3
SY_BUS
3-8)