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Principles
of Operation
6.5.4
Refresh display/read
keyboard
The
refresh display/
read
keyboard sequence
is
as follows:
NOTE
During power-on hardware
initialization,
the
U9
shift register
(6522A VIA)
is
con-
figured
for
Output and
the
low
true
KEY
signal
is
negated.
1.
Set the
BLANK
line
high.
2.
Send
nine bytes of
DISPDATA
out
the
VIA
shift
register
to
drive the next
column
in
the
multiplex sequence.
3.
Set
the
BLANK
line
low.
4.
Configure
the
VIA
shift
register for input.
5.
Assert
the
low
true
KEY
line.
6.
Read
the
VIA
shift
register to
cause
the
KEYDATA
to
be
shifted into the
VIA.
7.
Read
the
VIA
shift
register
again
to
get the byte
of
KEY-
DATA.
8.
Negate
the
low
true
KEY
line.
9.
Configure
the
VIA
shift
register for
output.
6.6
Light
pen
interface
The
light
pen
interface circuitry resides
on
the
digital
board.
A
simplified
schematic
is
shown
in
Figure 6-10.
The
light
pen
is
a vSelf-contained unit
requiring only
a 5-volt
supply.
It
returns
two TTL-compatible
signals:
•
SENSEPULSE
—
A
low-going
pulse
of about 15psec
width
that
occurs
as the
light
intensity
at
the
end of
the
pen
rises
above
a preset threshold.
•
LPSWITCH
—
A
debounced
switch
signal
that
is
low
while
the
light
pen
pushbutton
is
depressed.
U10
65C21
RA
PA2
U21
7=0
U24
HCT74
D
Q|
MASTER/SLAVE
CONNECTORS
U9
6522A
VIA
PB7
CA2
CA1
IBQ
U21
U19
H>
HCT244
+5V
LPSWITCH
y
SENSEPULSE
y
LIGHT
PEN
CONNECTOR
TO
68B09
«•
IRQ
Figure 6-10
Light
pen
interface simplified
schematic
6-14
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