Sanyo DVD-DX500 Service Manual page 14

4) SDROM : M2L66A-7T (for DVD-DX500 and DVD-DX50)
This sends and receives data with MPEG decoder and performs the video signal processing.
Every video signal output from DVD player is once stored in SDRAM and then encoded in
MPEG decoder and finally output into the analog signal.
SDRAM applied to DVD module has the capacity of 6MBit(048576 x 6bit x Bank), sends
and receives data with MPEG decoder by 6 bit.
Description
The M2L66A is 6,777,26 bits synchronous high data rate Dynamic RAM orga-
nized as2 x 524,288 words by 6 bits, fabricated withhigh performance CMOS technol-
ogy. Synchronous design allows precise cycle control with theuse of system clock I/O
transactions are possibleon every clock cycle. Range of operating frequencies, program-
mable burst length and programmable latencies allow the same device to beuseful for
a variety of high bandwidth, high performance memory system applications.
Sm(SANYO_DVD-DX500)051220.indd 13
CIRCUIT OPERATIONAL DESCRIPTION
SDROM M2L66A-7T Block Diagram
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2005-12-29 8:58:45