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Tektronix Manuals
Measuring Instruments
318
Technical manual
Tektronix 318 Technical Manual
Logic analyzer
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Contents
Table of Contents
Troubleshooting
Bookmarks
Table of Contents
Table of Contents
List of Illustrations
Table of Contents
Operator's Safety Summary
Service Safety Summary
Introduction
Scope
Description
Modes of Operation
Configurations
Related Documents
Optional Accessories
Options
Standard Accessories
Standard and Optional Accessories
318/338 Electrical Specifications
Specifications
318/338 Environmental Specifications
318/338 Physical Specifications
Options
Installation
Introduction
Operating Instructions
Power Cord
Power Requirements
Menu Characteristics
Menu Default Displays
Menu Fields and the Edit Cursor
Menus and Submenus
Power-Up Configuration Display
Error Message and Acquisition Status Readout
Inputs During Acquisition
Major Mode Selection Field
Menu Functions
Setup Menu
Threshold Menu
Character Menu (Serial Only) (318S1/338S1)
Non-Volatile (NVM) Menu (318S1/338S1)
OPERATING INSTRUCTIONS (Cont.)
Remote (RMT) Menu (318S1/338S1)
State Table Menu
Timing Diagram Menu (Parallel Only)
Trigger Menu
Diagnostics
Power-Up Self Test
Diagnostics Menu
User-Changeable Fields for each Test's Display
Diagnostics Menu: First Display
CRT Test
CRT Test: Second Display
Diagnostic Test Descriptions
KBD Test
CLK Test
WR Test
ACQ Test
SQRAM Test
N&DLY Test
SEQ Test
THRSH Test
P6107 Probe Assignment and Compensation for the 318S1 and 338S1
SER Test
RMT Test
NVM Test
Digital Logic Conventions
General System Description
Section Organization
Theory of Operation
Acquisition Module
P6107 External Clock Probe
P6451 Parallel Data Probe
Parallel Data Inputs (A01 and A02)
Acquisition Control Board (A03)
Clock Selector
Data Buffers, Delay Lines, and First Lactches
Event/Delay Counter
External Clock Circuit
Qualifier Selector
Strobe Generator
Threshold Circuit
Trigger Sequencer
Word Recognizer
Bus Buffer
Display Controller and Character ROM
Key Control Logic
Mainframe
Mother Board (A08)
Mpu/Display Board (A06)
Rams
Rom
Rom/Threshold Board (A05)
Threshold Circuit
318S1/338S1 (A07)
A01 Input a Board <1> <2> A02 Input B Board <3> <4
Detailed Circuit Descriptions for the 318
Left-Side Panel
Overview
Power Supply (A11And A12)
Serial I/O Controller
Serial Input Comparator
Address Decoder <2
Clock Selector <4
External Clock Comparator <4
External Clock Input <4
Data Threshold Buffer <4
Glitch Control <2> <3> <4
Pipeline Register <1> <3
Word Recognizer <1> <2> <3
A03 ACQ Control Board <5> <6> <7
Simplified Diagram of the ACQ Control Circuitry on Schematics <5> and <6>
Probe Compensation <4
I/O Address Decoder <6
Qualify/Sqram Data Register <5
Clock Qualify Flip-Flop <6
Qualify Logic <5> <6
Retiming Clock <6
START/STOP Logic <6
Strobe Generator <6
Trigger Qualify Flip-Flop <6
External or Glitch Trigger Circuit <7
Retiming Flip-Flop <6
Address Buffer <7
N Flag Circuit
THEORY of OPERATION (Cont.)
Trigger Sequencer Flag <7
Trigger Sequencer RAM <7
Address Decoder
Lsi-A A03U158 <7
SQRAM Data/Word Recognizer Data Multiplexer <7
STOP Flag Circuit
SUCCEED Flag Circuit
TRIG'D Flag Circuit
ACQ Status Logic
DL Register
Event/Delay Counter
LSI-A Input Signals
Mask Register
N Register
A04 ACQ Memory Board <8> <9
Acquisition Memory and ACQ Address Counter <8
Chip Select Latch
LSI-A Input Signals
LSI-A Output Signals
ACQ Address Counter and Carry Latch
Acquisition Memory
Address Decoder
Data Selector
Divider, Timer, and Slow Clock Detector
ECL-To-TTL Translator and TTL Bus Buffer
INTCLK Buffer
Oscillator
Timebase and MPU Bus Interface <9
TTL-To-ECL Translator
Full Valid Flag Latch
Lsi-B (A04U 140)
Internal Clock (INTCLK)
Simplified Diagram of the Timebase and MPU Bus Interface Circuit
318/338 A05 Rom/Threshold Board --<10
Memory Map
ROM Circuitry
Analog Switches
D/A Converter
Threshold Circuit
Simplified Diagram of the ROM and Threshold Circuits
318/338 A06 Mpu/Display Board <11
Bus Drivers
Display Controller
Interrupt Gates
Keyboard and Keyboard Controller
Mpu
Ram
Simplified Diagram of the Mpu/Display Board
318/338 A07 Serial, Non-Volatile Memory, Rs232C <17> <18
Chip Select Controller
Clock-Level Translator
Input Comparator
Non-Volatile Memory <17
Offset Adjust
Serial Input <17
THEORY of OPERATION (Cont.)
Threshold Voltage Detector
Battery Switch
Battery Voltage Checker
Random Access Memory
Baud-Rate Selector
Data Bus Buffer
I/O Selector
Serial Data Acquisition <18
External Trigger Latch and Data Polarity
Option I/O Device Addressing and Function
Serial I/O Controller
Baud-Rate Selector
Control <18
Level Converter
Programmable Bit-Rate Generator Outputs
RS-232 Control <18>
Serial I/O Controller
318/338 A10 CRT Board <14
Z-Axis Amplifier
Horizontal Sweep Generator
318/338 A11 Power Supply <15> <16
Line Input <15
Vertical Sweep Generator
Inverter Start Network <15
Dead Time Controller
Inverter Control <16
Low Voltage Rectifiers and Regulators <16
Over/Under Voltage Protection <16
Regulator
Volt and -12 Volt Supplies
Volt Supply
Address Decoder <20
Detailed Circuit Descriptions for the 338
Fan Circuit and Fan <16
Overview
Glitch Control (CH 0-7) <21
A03 ACQ Control Board <5> <6> <7
Simplified Diagram of the ACQ Control Circuitry on Schematics <5> and <6>
Probe Compensation <21> <22
Threshold Buffer <22
Word Recognizer <19> <21
I/O Address Decoder <6
Qualify/Sqram Data Register <5
Clock Qualify Flip-Flop <6
Qualify Logic <5
Retiming Clock <6
START/STOP Logic <6
THEORY of OPERATION (Cont.)
Trigger Qualify Flip-Flop <6
External or Glitch Trigger Circuit <7
Retiming Flip-Flop <6
Strobe Generator <6
Address Buffer <7
Trigger Sequencer Flag <7
Trigger Sequencer RAM <7
Lsi a A03U158 <7
N Flag Circuit
SQRAM, Data/Word Recognizer, Data Multiplexer <7
STOP Flag Circuit
SUCCEED Flag Circuit
TRIG'D Flag Circuit
ACQ Status Logic
Address Decoder
DL Register
Event/Delay Counter
Mask Register
N Register
LSI-A Output Signals
A04 ACQ Memory Board <8> <9
Acquisition Memory
Acquisition Memory and ACQ Address Counter <8
Chip Select Latch
ACQ Address Counter and Carry Latch
Address Decoder
Data Selector
Divider, Timer, and Slow Clock Detector
INTCLK Buffer
Oscillator
Timebase and MPU Bus Interface <9
TTL-To-ECL Translator
ECL-To-TTL Translator and TTL Bus Buffer
Full Valid Flag Latch
LSI-B (A04U140) Output Signals
Lsi-B A04U140
Internal Clock (INTCLK)
Verification and Adjustment Procedures
318/338 Multi-Probe Test Fixture
Introduction
Suggested Test Instruments
Test Setup Information
Equipment Needed for the Adjustment Procedures and the Performance Check Procedures
Functional Check Procedures for the 318
Minimum Specifications for Test Equipment
Check 1. Power-Up Diagnostics
Check 2. Keyboard
Index of Functional Checks
Mainframe and Parallel Analyzer
Check 3. CRT
Check 4. Threshold Voltage
Check 5. Parallel Data Acquisition with Test Output
Check 6. Glitch Data Acquisition with Test Output
Check 7. Serial State Analyzer Check for the 318
Adjustment Procedures for the 318
Introduction
Index of Adjustment Steps
Mainframe
Adjustable Power Supply Tolerances
Non-Adjustable Power Supply Tolerances
Parallel Analyzer
Clock Delay with Extender
Clock Delay Without Extender
Serial State Analyzer
Index of Performance Checks
Performance Check for the 318
Test 1. Threshold Voltages
The Performance Checks
Voltage Levels for Testing TTL
Voltage Levels for Testing V1, V2, and V3
Test 2. Parallel Data Acquisition Word Recognition and Trigger Sequencer Check with External Clock Minimum Period
Test 3. Glitch Data Acquisition and Glitch Trigger
Positive Glitch Pulse Generator Setup
Negative Glitch Pulse Generator Setup
Test 4. Start Output and Trigger Output Test
Test 5. External Trigger Input Test
Test 6. Serial State Analyzer (318S1)
Functional Check Procedures for the 318
Index of Functional Checks
Check 1. Power-Up Diagnostics
Check 2. Keyboard
Check 3. Crt
Mainframe and Parallel Analyzer
Check 4. Threshold Voltage
Check 5. Parallel Analyzer Check with Test Output
Check 6. Glitch Data Acquisition Using Test Output
Check 7. Serial State Analyzer Check for the 338S1
Adjustment Procedures for the 338
Introduction
Index of Adjustment Steps
Adjust Power Supplies
Mainframe
Non-Adjustable Power Supply Tolerances
Adjust CRT Circuit
Adjust Threshold Voltages on the A05 ROM Board
Adjust Threshold Voltages on the A02 Input-B Board
Parallel Analyzer
Data Threshold DC Balance
Probe Compensation for the P6107 External Clock Probe
Adjust Ext Clk↑ and Ext Clk↓ Delay
Adjust Delay of RET CLK, WE, ADRS CLK and TRIG CLK
Clock Delay with Extender
Adjust Threshold Voltages on the A07 Board
Clock Delay Without Extender
Serial State Analyzer
Adjust Input Capacitance and Serial Data Probe Compensation
Adjust Non-Volatile Memory Battery Backup Threshold
Index of Performance Checks
Performance Check for the 338
Setup
Test 1 - Threshold Voltages
Threshold Level TTL
Threshold Levels V1, V2, and V3
Voltage Levels for Testing TTL
Test 2 - Parallel Data Acquisition, Word Recognition, and Trigger Sequencer Checks with External Clock Minimum Period
Parallel Data Test Oscilloscope Setup
Test Conditions and Expectations
Test 3 - Glitch Data Acquisition and Glitch Trigger
Setup
Positive Glitch Pulse Generator Setup
Negative Glitch
Negative Glitch Pulse Generator Setup
Test 4 - Start Output and Trigger Output
Test 5 - External Trigger Input
Test 6 - Serial State Analyzer (338S1)
Serial State Analyzer Test Setup
Maintenance Precautions
Maintenance: General Information
Soldering
Test Equipment Required for Maintenance
Tools Required for Maintenance
Troubleshooting Trees
Light-Emitting Diodes (Leds)
Static Precautions
Exterior Cleaning
Lithium Battery Replacement
Preventive Maintenance
Relative Susceptibility of Semiconductors to Static Discharge Damage
Cleaning Guidelines
Inspection
Interior Cleaning
Acquisition Boards and Probes
Corrective Maintenance
Obtaining Replacements
Repairing Multi-Conductor Connectors
Circuit Board Pin Replacement
Circuit Board Locations
Component Locations
Disassembly/Installation Procedures
General Disassembly Precautions
Circuit Board Locations
Removing the Cabinet
Removing the Front Panel
Removing the Keyboard
Removing the Power Supply Circuit Boards
Power Supply Removal
Removing the Cathode-Ray Tube (CRT)
Removing the CRT Circuit Board
Diagnostic Test Common Signal Paths
Diagnostic Test Descriptions
Index of 318 Diagnostic Test Descriptions
Maintenance: Troubleshooting
Diagnostic Test Common Signal Paths
Keyboard Test
Keyboard Test Key Code and Interrupt Assignment
Mainframe
CRT Adjustment
CRT Test
CRT Calibration and Check
Jump Table ROM Test
Display RAM Test
System RAM Test
ROM Test
ROM Test Address Assignment
A03 and A04 Partial ACQ Address Assignment
Clock Test
Parallel Analyzer
Clock Test Program Ranges
Word Recognizer Test
Word Recognizer Test Port Addresses
Word Recognizer Test
ACQ Test Port Addresses
Acquisition RAM Test
ACQ Memory Test
Sequence RAM Test
SQRAM Test Port Addresses
SQRAM Test SQRAM Data Connections
SQRAM Test
N & Delay Test
N and Delay Counter Test
Threshold Test
Threshold Test Data Values
SEQ Test
318S1 Serial Analysis/Rs232C/Nvm
Battery Test
Non-Volatile Memory Test
Serial Test
Option I/O Function List
Serial Test I/O Addresses
Serial Test Baud Select Bits
Diagnostic Test Failure Codes
Diagnostic Test Failure Codes
Troubleshooting Trees
Troubleshooting Tree 2: Startup Self Test
Troubleshooting Tree 3: Power Supplies A11, A12
Troubleshooting Tree 4: CRT A10
Troubleshooting Tree 5: MPU A06
Troubleshooting Tree 6: Clock A04
Troubleshooting Tree 7: Word Recognizer (WR A01 A02)
Troubleshooting Tree 8: Data Acquisition (ACQ A01 A02)
Troubleshooting Tree 9: SQRAM A03
Troubleshooting Tree 10: N&DL A03
Troubleshooting Tree 11: SEQ A03
Troubleshooting Tree 12: T/H A01, A02
Troubleshooting Tree 13: T/H A04
Troubleshooting Tree 14: SER A07 (TSTSR2)
Troubleshooting Tree 15: RMT A07 (TSTRM2)
Troubleshooting Tree 16: Non-Volatile Memory (NVM A07)
Troubleshooting Tree 17: Can't Get Glitch
Troubleshooting Tree 18: Can't Get Good Data
Troubleshooting Tree 19: Diagnostics Pass Can't Stop
Troubleshooting Tree 20: Can't Get Glitch Trigger
Troubleshooting Trees
Troubleshooting Tree 21: Test Output - Doesn't Work
Diagnostic Test Descriptions
Diagnostic Test Common Signal Paths
Keyboard Test Key Code and Interrupt Assignment
CRT Adjustment
CRT Calibration and Check
Jump Table ROM Test
Display RAM Test
System RAM Test
MPU Memory Address Assignment
A03 and A04 Partial ACQ Address Assignment
Parallel Analyzer
ROM Test Address Assignment
Clock Test
Clock Test Program Ranges
Word Recognizer Test
Word Recognizer Test Port Addresses
Word Recognizer Test
Acq Ram Test
ACQ Test Port Addresses
ACQ Memory Test
SQRAM Test Port Addresses
SQRAM Test
SQRAM Test SQRAM Address Connections
SQRAM Test SQRAM Data Connections
N & DELAY Test
N and Delay Counter Test
Threshold Test
Threshold Test Data Values
SEQ Test
S1 Serial Analysis/Rs232C/Nvm
RS-232 Test
Serial Test I/O Addresses
Option I/O Function List
Serial Test Baud Select Bits
Troubleshooting Tree 1: Power on
Troubleshooting Trees
Troubleshooting Tree 3: Power Supplies A11, A12
Troubleshooting Tree 4: CRT A10
Troubleshooting Tree 5: MPU A06
Troubleshooting Tree 6: Clock A04 (CLK)
Troubleshooting Tree 7: Word Recognizer (WR A01 A02)
Troubleshooting Tree 8: Data Acquisition (ACQ A01 A02)
Troubleshooting Tree 9: SQRAM A03
Troubleshooting Tree 10: NDL A03
Troubleshooting Tree 11: SEQ A03
Troubleshooting Tree 14: SER A07 TSTSR2
Troubleshooting Tree 15: REMOTE A07 TSTRM2 (RMT)
Troubleshooting Tree 16: Non-Volatile Memory (NVM A07)
Troubleshooting Tree 18: Can't Get Good Data
Troubleshooting Tree 19: Diagnostics Pass Can't Stop
Troubleshooting Tree 20: Can't Get Glitch Trigger
Troubleshooting Tree 21: Test Output Doesn't Work
Appendix A REFERENCES
Appendix C ERROR and ACQUISITION STATUS MESSAGES
Appendix E ERROR CODES
Error Codes in Self Test
Error Codes of Parallel Tests in Diagnostics Menu
Error Codes of Serial Tests in Diagnostics Menu
Error Codes of Remote Tests in Diagnostics Menu
Error Codes of NVM Tests in Diagnostics Menu
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List of Illustrations
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Scope
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Modes of Operation
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TM 11-6625-3145-14
TECHNICAL MANUAL
OPERATOR'S, ORGANIZATIONAL, DIRECT SUPPORT,
AND GENERAL SUPPORT MAINTENANCE MANUAL
LOGIC ANALYZER
TEKTRONIX MODELS 318/338
H E A D Q U A R T E R S , D E P A R T M E N T O F T H E A R M Y
12 SEPTEMBER 1985
Table of
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Chapters
Table of Contents
7
Table of Contents
20
Table of Contents
Troubleshooting
MAINTENANCE: GENERAL INFORMATION
240
MAINTENANCE: TROUBLESHOOTING
254
TROUBLESHOOTING TREES
292
Troubleshooting Tree 2: Startup Self Test
293
Troubleshooting Tree 3: Power Supplies A11, A12
294
Troubleshooting Tree 4: CRT A10
296
Troubleshooting Tree 5: MPU A06
300
Troubleshooting Tree 6: Clock A04
305
Troubleshooting Tree 7: Word Recognizer (WR A01 A02)
307
Troubleshooting Tree 8: Data Acquisition (ACQ A01 A02)
310
Troubleshooting Tree 9: SQRAM A03
316
Troubleshooting Tree 10: N&DL A03
320
Troubleshooting Tree 11: SEQ A03
322
Troubleshooting Tree 12: T/H A01, A02
326
Troubleshooting Tree 13: T/H A04
327
Troubleshooting Tree 14: SER A07 (TSTSR2)
328
Troubleshooting Tree 15: RMT A07 (TSTRM2)
332
Troubleshooting Tree 16: Non-Volatile Memory (NVM A07)
336
Troubleshooting Tree 17: Can't Get Glitch
338
Troubleshooting Tree 18: Can't Get Good Data
339
Troubleshooting Tree 19: Diagnostics Pass Can't Stop
341
Troubleshooting Tree 20: Can't Get Glitch Trigger
343
TROUBLESHOOTING TREES
344
Troubleshooting Tree 21: Test Output - Doesn't Work
345
Troubleshooting Tree 1: Power On
385
TROUBLESHOOTING TREES
386
Troubleshooting Tree 3: Power Supplies A11, A12
388
Troubleshooting Tree 4: CRT A10
390
Troubleshooting Tree 5: MPU A06
394
Troubleshooting Tree 6: Clock A04 (CLK)
399
Troubleshooting Tree 7: Word Recognizer (WR A01 A02)
401
Troubleshooting Tree 8: Data Acquisition (ACQ A01 A02)
405
Troubleshooting Tree 9: SQRAM A03
412
Troubleshooting Tree 10: NDL A03
416
Troubleshooting Tree 11: SEQ A03
418
Troubleshooting Tree 14: SER A07 TSTSR2
424
Troubleshooting Tree 15: REMOTE A07 TSTRM2 (RMT)
428
Troubleshooting Tree 16: Non-Volatile Memory (NVM A07)
432
Troubleshooting Tree 18: Can't Get Good Data
435
Troubleshooting Tree 19: Diagnostics Pass Can't Stop
436
Troubleshooting Tree 20: Can't Get Glitch Trigger
437
Troubleshooting Tree 21: Test Output Doesn't Work
438
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