Receiver Back-End - Motorola GP344 Detailed Service Manual

1-4 THEORY OF OPERATION
The output of the bandpass filter is coupled to the RF amplifier transistor Q3302 via C3306. After
being amplified by the RF amplifier, the RF signal is further filtered by a second varactor tuned
bandpass filter, consisting of L3305, L3306, C3311 to C3314 and D3302.
Both the pre and post-RF amplifier varactor tuned filters have similar responses. The 3 dB
bandwidth of the filter is about 12 MHz. This enables the filters to be electronically controlled by
using a single control voltage which is DACRx .
The output of the post-RF amplifier filter is connected to the passive double balanced mixer which
consists of T3301, T3302 and CR3301. Matching of the filter to the mixer is provided by C3317,
C3318 and L3308. After mixing with the first LO signal from the voltage controlled oscillator (VCO)
using high side injection, the RF signal is down-converted to the 44.85 MHz IF signal.
The IF signal coming out of the mixer is transfered to the crystal filter (Y3200) through a resistor pad
(R3321 - R3323) and a diplexer (C3320 and L3309). Matching to the input of the crystal filter is
provided by C3200 and L3200. The crystal filter provides the necessary selectivity and
intermodulation protection.
3.2

Receiver Back-End

The output of crystal filter Y3200 is matched to the input of IF amplifier transistor Q3200 by
capacitor C3203. Voltage supply to the IF amplifier is taken from the receive 5 volts (R5). The gain
controlled IF amplifer provides a maximum gain of about 10dB. The amplified IF signal is then
coupled into U3220(pin 3) via L3202, C3207, and C3230 which provides the matching for the IF
amplifier and U3220.
The IF signal applied to pin 1 of U3220 is amplified, down-converted, filtered, and demodulated, to
produce the recovered audio at pin 7 of U3220.
Within U3220, the first IF 44.85 MHz signal mixes with the 44.395 MHz second local oscillator (2nd
LO) to produce the second IF signal at 455 kHz. The 2nd LO signal frequency is determined by
crystal Y3201. The second IF signal (455 kHz) is then filtered by an external ceramic filter Y3205
before being amplified by the second IF amplifier within U3220. Again, the signal is filtered by a
second external ceramic filter Y3203 or Y3204 depending on the selected channel spacing. Y3203
is used for 20/25 kHz channel spacing whereas Y3204, for 12.5 kHz channel spacing. The simple
circuit consisting of U3221, CR3202, CR3203 and resistors R3209, R3212, R3211 and R3205 divert
the second IF signal according to the BW_SEL line. The filtered output of the second IF signal is
applied to the limiter input pin of U3220 (Pin 14).
The IF IC (U3220) contains a quadrature detector using a ceramic phase-shift element (Y3202) to
provide audio detection. Internal amplification provides an audio output level around 120mVrms
(@60% deviation) from pin 8 of U3220. This demodulated audio is fed to the ASFIC_CMP IC
(U404) in the controller section.
In the absence of an IF signal, the VCO will "search" for a frequency, or its frequency will vary close
to twice the IF frequency. When an IF signal is received, the VCO will lock onto the IF signal. The
second LO/VCO is a Colpitts oscillator built around transistor Q3270. The VCO has a varactor
diode, D3270, to adjust the VCO frequency. The control signal for the varactor is derived from a loop
filter consisting of C3278 to C3280, R3274 and R3275.
The IF IC (U3220) also performs several other functions. It provides a received signal-strength
indicator (RSSI) and a squelch output. The RSSI is a dc voltage monitored by the microprocessor,
and used as a peak indicator during the bench tuning of the receiver front-end varactor filter. The
RSSI voltage is also used to control the automatic gain control (AGC) circuit at the front-end.