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A
B
SCHEMATIC DIAGRAM (DSP)
ANALOG INPUT L
1
Q Q
3 7 6 3 1 5 1 5 0
2
4.0
0
5.0
0
0
5.0
0
0
3
0
4
T E
L
1 3 9 4 2 2 9 6 5 1 3
5.0
3.3
3.3
2.2
1.6
DTA123JKA
5
0
5.0
3.3
3.3
2.3
DTA123JKA
1.6
0
6
7
# All voltage are measured with a 10MΩ/V DC electric volt meter.
# Components having special characteristics are marked s and must be replaced
w w w
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
8
.
# Unless otherwise specified, all resistors are 1608 size chip resistors.
# Unless otherwise specified, all capacitors are 1608 size chip capacitors.
# Flame proof carbon resistors are all 1/4W.
● 指示のない抵抗はすべて1608サイズチップ抵抗です。
● 指示のないコンデンサはすべて1608サイズチップコンデンサです。
● 不燃化カーボン抵抗はすべて1/4Wです。
9
C
D
E
0
2.5
0
0
DSP/DOLBY/DTS
5.0
0
0
0
0
0
0
0
0
3.3
0
0
0
3.2
0
0
0
0
2.3
4.5
4.9
0
0
4.0
0
0
1
2.5
0
4.9
0
4.9
4.9
4.9
16bit µ-COM
4.9
4.9
0
4.9
4.9
4.9
0
2
0
0
4.9
0
4.9
0
4.9
Page 26
B5
to AMP (CB302)
IC8~12: NJM4558M
Dual OP-Amp
x
a o
OUT
1
8
y
+V
1
CC
–IN
2
7
OUT
1
2
i
+
–
+
–
+IN
3
6
–IN
1
2
–V
4
5
+IN
CC
2
F
G
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8
12.0
4.4
12.0
4.4
4.4
4.4
4.4
4.4
0
0
4.4
4.4
4.4
4.4
4.4
2.5
4.4
0
CENTER
SURROUND L
ADC/DAC
~
2.4
3.3
1.2
2.4
1.1
2.4
1.1
1.3
2.4
~
1.7
2.4
1.2
1.7
2.4
0
0
0
FRONT L
5.1
5.1
3.3
2.3
1.6
2.3
4.9
2.7
0
2.3
4.9
2.3
1.6
4.9
0
1.7
1.7
2.5
0
3.3
3.3
3.3
0
2.5
0
0
Q
Q
2.5
3
7
6
3
0
RESET
A
4.8
0
0
0
0
5.0
5.0
0
0
0
0
4.9
3
EEPROM
IC7: S-29390AFJA
IC6: TC74HCT08AF
IC5: PQ025EZ5MZP
Quad 2-Input And Gate
Voltage Regulator
CMOS 4kbit Serial EEPROM
Vin
1
u 1 6 3
1A
1
14
Vcc
Memory array
Address decoder
1B
2
13
4B
1Y
3
12
4A
6
.
Data register
Output buffer
DO
2A
4
11
4Y
5
DI
2B
5
10
3B
8
TEST
Mode decode logic
2Y
6
9
3A
CS
3
1
NC
GND
7
8
3Y
2
Vcc
SK
4
Clock generator
7
GND
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H
I
2
4
9
9
5.1
5.1
2.3
2.3
5.1
5.1
2.3
2.3
12.0
4.4
4.4
4.4
0
4.4
4.4
4.4
12.0
4.4
4.4
4.4
0
4.4
4.4
4.4
5.1
5.1
0
12.0
4.4
4.4
5.1
4.4
0
CENTER
REGULATOR
2.5 4.9 5.1
1
5
1
5
0
4.4
8
9
2
4.4
4.4
POWER DOWN
15.0
15.0
0.033
DETECT
14.3
7.0
7.0
B
7.0
0
IC3 : CS4228A
ADC/DAC
Page 26
C6
to AMP (CB304)
LRCK
6
SCLK
5
SDIN1
3
SDIN2
2
SDIN3
1
SDOUT
4
IC4: TA48M033F
m
Voltage Regulator
3
Vo
c o
INPUT
1
Short
Protection
2
Vc
5
Excessive Voltage Protection
OUTPUT
2
Over Heat Protection
GND
–
+
3
GND
J
K
L
TSS-10
Point 1 Pin 1 of IC1
2
8
9
9
FRONT L
Point 2 Pin 13 of IC2
SURROUND L
Point 3 collector of Q1 and emitter of Q2
A Q1 C
4
9
8
2
9
9
B Q2 E
3.00S
POWER ON
POWER OFF
(Connect the power cord)
(Disconnect the power cord)
A Q1 C
B Q2 E
At start-up
11
12
13
15
14
8
9
21
CONTROL PORT
MUTE CONTROL
18
FILT
∆∑ DAC #1
DIGITAL VOLUME
23
FL
DIGITAL VOLUME
∆∑ DAC #2
24
FR
∆∑ DAC #3
SL
DIGITAL VOLUME
25
∆∑ DAC #4
DIGITAL VOLUME
26
SR
DIGITAL VOLUME
∆∑ DAC #5
27
CENTER
∆∑ DAC #6
SUB
DIGITAL VOLUME
28
20
AINL+
LEFT ADC
AINL-
19
16
AINR+
LEFT ADC
17
AINR-
CLOCK MANAGER
10
7
22
25
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