Sony KV-32FQ80B Service Manual page 62

A B C
B5.-32/36FQ80
1
B5
4/8
2
VP_SUB_IN
3
R4603
0
CHIP
XRST
VDO_CLK_IN
VDOPLLHLD
R4605
XX
R4604
XX
IC4601
XX
4
C4600 C4601
XX XX
XVDOHS
R4609
0
CHIP
V_SUB_IN
U_SUB_IN
R4610
0
CHIP
5
Y_SUB_IN
R4611
0
CHIP
A5V-1
R4701 R4704 R4707 R4710 C4700
120
120 120 120 0.01 R4612
FL4600
25V 0
0UH
CHIP
EMI
R4705 R4708 R4711 C4701
R4702
68 75 100 75 0.1 C4604
16V 0.01
6 25V
R4613
R4703 R4706 R4709 R4712 C4702
0
10 22 15 22 0.1
CHIP
16V
D_OUT
Page 7
DB[7] CB[7]
DB[6] CB[6]
RB4600
22
DB[5] CB[5]
DB[4] CB[4]
7
DB[3] CB[3]
DB[2] CB[2]
RB4601
22
DB[1] CB[1]
DB[0] CB[0]
DR[7] CR[7]
DR[6] CR[6]
RB4602
DR[5] CR[5] 22
DR[4] CR[4]
DR[3] CR[3]
DR[2] CR[2]
8
RB4603
DR[1] CR[1]
22
DR[0] CR[0]
DY[7] Y[7]
DY[6] Y[6]
RB4604
22
DY[5] Y[5]
DY[4] Y[4]
DY[3] Y[3]
DY[2] Y[2]
RB4605
DY[1] Y[1]
22
9 DY[0] Y[0] C4605 C4606 C4607
FL4601
10 0.01 10
16V 0UH
25V 16V
+2.5V
EMI
G
FL4602
0UH
D3.3V-MID
EMI
G
FL4603
0UH
EMI
G
C4608
10 0.01
25V
COMPONENTS MARKED AS XX ARE NOT FITTED ON THIS MODEL
11
D E F
C4630
0.01
25V
D5V
180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165
Q4600
2SD601A
BUFFER
181 VDOCIN7
R4601 182 VDOCIN6
0
VDOCIN5
R4600 CHIP 183
3.3k
184 VDOCIN4
CHIP
R4602 185 VDOCIN3
2.2k
186 AUXC_IN7
CHIP
187 AUXC_IN6
188 AUXC_IN5
189 AUXC_IN4
VDOCIN2
190
191 VDOCIN1
192 VDOCIN0
193 OVDD22
194 VDOCLKIN
C4603
195 OVDD11
0.01
VDOPLLHLD
196
197 VDD1
R4606
XX 198 VSS
199 XRESET
200 VPDTEST
201 XVDOVS
R4607 10k
202 XVDOHS
XOSDHS
203
C4602
204 XOSDVS
XX
R4608
10k 205 VDOCLAMP
206 AVCCAD3
207 AVSSAD3
208 ANCRIN
AVCCAD2
209
ANCBIN
210
211 AVSSAD2
212 ANREF2
213 ANREF1
214 AVCCAD1
215 ANYGIN
AVSSAD1
216
MS_Y[7]
217 DTVYIN7
MS_Y[6]
218 DTVYIN6
MS_Y[5]
219 DTVYIN5
MS_Y[4]
220 DTVYIN4
RB4625
0 221 VDD1
G VSS
222
DTVCLKIN
223
224 OVSS2
MS_Y[3]
225 DTVYIN3
MS_Y[2]
226 DTVYIN2
MS_Y[1]
227 DTVYIN1
MS_Y[0]
228 DTVYIN0
RB4626
MS_C[7]
DTVCIN7
XX 229
MS_C[6]
230 DTVCIN6
MS_C[5]
231 DTVCIN5
232 AUXC_IN3
233 AUXC_IN2
234 AUXC_IN1
RB4627 AUXC_IN0
235
XX
MS_C[4]
DTVCIN4
236
MS_C[3]
237 DTVCIN3
MS_C[2]
238 DTVCIN2
MS_C[1]
239 DTVCIN1
MS_C[0]
240 DTVCIN0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
RB4628
XX
C4611
0.01
25V
C4610
10
16V R4614 R4615 R4616
XX XX XX
MS_YC
C4609
10
16V
G H I
C4629
R4698
0.01
47
25V
C4628
0.01
25V
164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130
IC4600
CXD9509AQ
MID-XA
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
C4614
C4612
C4613
0.01 0.01
0.01
25V 25V
25V
R4626
0
CHIP
DRCDCLK1
HDMID1
VDMID1
MS_H_SYNC:D
MS_HS
MS_V_SYNC:D
MS_VS
MS_CLOCK:D
MS_CLK
7 5 3 1 7 5 3 1 RB4608
RB4606
XX
8 6 4 2 8 6 4 2
- 62 -
J K L M
C4627
0.01
129 128 127 126 125 124 123 122 121
120
SDADR3
D[16]
119
SDDAT16
D[17]
SDDAT17 118
D[18]
SDDAT18 117
D[19]
SDDAT19 116 C4626 0.01
VSS 115
VDD2 114
D[20]
113
SDDAT20
D[21]
112
SDDAT21
D[22]
SDDAT22 111
D[23]
SDDAT23 110
D[24]
SDDAT24 109
D[25]
SDDAT25 108
107
VDDSD
D[26]
106
SDDAT26
D[27]
SDDAT27 105
D[28]
SDDAT28 104
D[29]
SDDAT29 103
C4625 0.01
VSS 102
VDD1 101
D[30]
SDDAT30 100
D[31]
SDDAT31 99
R4638 10k
XSM
98
MST 97
R4637 R4635 0
R4634
TMODENB 96
10k 10k
R4636 10k FB4600
IICCKSEL 95 0uH
SCL-MID
IICSCL 94
SDA-MID
IICSDA 93
FB4601
OVDD21
92 0uH
DXT1IN 91
C4623 0.01
C4624 C4622
X4601
VSS 90 12p 12p
50V 13.5MHz
VDD1 89
DXT1OUT 88
AVCCSD 87 C4621 0.01
25V
FL4606
AVSSSD 86
EMI
0UH R4633
R4631 0
AVSSDSP
85
XX
DSPLPF1 84
R4629 10k R4630 270
R4632 0
DSPLPF0 83
C4620
AVCCDSP 82
FL4604 4700p
C4618
R4628
DXT2OUT 81 0UH 50V
0.01
10k
25V
XTST 80
EMI
DSPCLK
79 C4617
0.01
VSS 78
VDD1 77 R4627
XX
DXT2IN 76
OVSS3 75 DSPCLK
XDSPYS 74 DPIC_SW
XDSPVS 73 VP_100_OUT
XDSPHS HP_100_OUT
72
DSPCR0 71
DSPCR1 70
DSPCR2 69
DSPCR3 68
RB4611
VSS 67
XX
VDD2
66
DSPCR4 65
DSPCR5 64
DSPCR6 63
DSPCR7 62
RB4610
DSPCB0 61
XX
52 53 54 55 56 57 58 59 60
C4615
0.01 C4616
0.01
25V
25V
PDAC_IN
Page 6
BP[0]
BP[1]
BP[2]
BP[3]
BP[4]
BP[5]
BP[6]
BP[7]
GP[0]
GP[1]
GP[2]
GP[3]
GP[4]
GP[5]
GP[6]
GP[7]
2 4 6 8 7 5 3 1
XX
RB4609
XX
1 3 5 7 8 6 4 2
RB4607
XX
~ B5 Board Schematic Diagram [ Picture Decoder, DRC, Digital Noise Reduction ] Page 4/8~
N
ADD, DATA, WE, RAS, CAS, CS
Page 5
R[0]
R[1]
R[2]
R[3]
R[4]
R[5]
R[6]
R[7]
DSP_Y/CR/CB
Page 3