Schematic Diagram - Main Board (5/7) - Sony HT-ST7 Service Manual

4-9.

SCHEMATIC DIAGRAM - MAIN Board (5/7) -

1 2 3
MAIN BOARD (5/7)
A (Page 35)
CEC
>101S
HDMI_5VPWR
MAIN
BUS1
BOARD
(1/7) PCON_HDMI
(Page 36)
B
>105S
BUS5
BUS3
MAIN
BOARD
PCON1
(2/7)
SW3.3V
(Page 38)
SEL_HDMI
>111S HDMI_MUTE
C
PCON2
MAIN
HDMI_NLPCM
BOARD
(4/7)
WL_LRCK
WL_BCK
WL_D3CSW
CN1001
13P
D SW3.3V 1
JL1061
WL_RF 2
JL1059 R1236 100
WL_DET 3
JL1058 R1235 100
FFC4 WL_INT 4
JL1057 R1234 100
WL_SDA 5
>03S
WL_RESERVED 6
JL1056 R1233 100
WL_SCL 7
IO
JL1055 R1232 100
BOARD
WR_RESET 8
CN4001 JL1054
E WL_D0 9
(Page 47)
DGND 10
JL1053
WL_BCK 11
DGND 12
JL1052
WL_LRCK 13
F
(Page 41)
SW3.3V
PCON3
>112S
PCON1
MAIN
PCON_HDMI
BOARD
(7/7)
CL1209
PCON_DSP
DGND
G
R1004
22k (US, CND, AUS)
4.7k (AEP, UK)
S_MUTE
S_MUTE
DRIVER_RST
(Page 38) DRIVER_RST
H NS_INIT
>110S
SD
DC_PRT
MAIN
BOARD
OVF1
(4/7)
DAMP_PDN
DAMP_PDN
AMP_SDA
AMP_SDA
AMP_SCL
AMP_SCL
I
DSP_INT
(Page 37) DSP_RESET
DSP_SFLASH_HOLD
DSP_SFLASH_HOLD
>109S DSP_SPI_CS
DSP_SPI_CS
SPI_MISO
MAIN
J
BOARD
SPI_MOSI
(3/7)
SPI_CLK
DSP_RXD
DSP_TXD
K
R1007
4.7k
R1006
4.7k
L
8 7
IC1001
EEPROM
IC1001
R1EX24016ASAS0A
M
1 2
C1001
0.1
HT-ST7
• See page 52 for Waveforms. • See page 58 for IC Pin Function Description.
4 5 6 7
SEL_HDMI
WL_DET
WL_INT
WL_SDA
WL_SCL
WL_RST
3.1
76 FL_CS
3.2
77 FL_CLK
3.2
78 PCONT_HDMI
79 N.A.
3.2
80 PCONT_DSP
SW_NFC 0
81 SW_NFC
LED_PW 0
82 LED_PW
R1013
IRQ_NFC 0
47k
83 IRQ_NFC
SEL_NFC 0
84 SEL_NFC
(US, CND, AUS)
DATA_NFC 0
85 DATA_NFC
SPICLK_NFC 3.2
86 SPICLK_NFC
R1017 R1016
87 N.A.
10k 1k
88 N.A.
0
R1004
89 LED_MUTE
NS_INIT 3.2
90 DESTINATION
R1014 10k
SD 0
R1001
91 MODEL
10k
R1010 100
DC_PRT 3.2
92 KEY2
R1011 100
OVF1 3.2
93 KEY1
R1002
R1003
10k 94 AVss
10k
R1012 100
3.2
95 KEY0
3.2
96 Vref
3.2
97 AVcc
DIR_DO 3.3
98
DIR_DI 0
99
DIR_CLK 0
100
DSP_INT
C1002
DSP_RESET
0.1
C1003
0.1
SPI_MISO
SPI_MOSI
R1025
SPI_CLK
100
SPI_MOSI
DSP_RXD
R1027 JL1001
DSP_TXD
100
SPI_MISO
SPI_CLK
R1029
R1023
100
100
C1006 R1018 R1028 R1026
0.1 100k 100k 100k
CL1002
C1007
0.1
CL1003
R1034
X1001
R1033
8MHz
0
6 5
R1020
100
3 4
8 9 10 11
D1001
R1031
10k
R1021 R1022
100 47k
R1030
10k
R1015
10k
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
0
50
3.2
49
3.2
48
SF_HOLD_DSP 2.9
47
DSP_RESET 1.6
HDMI_SCL 46
DSP_SPIDS 2.8
HDMI_SDA 45
HDMI_MUTE_DET 3.2
WR_Flash 44
3.2
PCONT_BT 43
3.2
BT_RST 42
3.3
WL_SDA 41
3.3
WL_SCL 40
IC1002
0
HOLD 39
3.2
SYSTEM CONTROLLER A_SEL0 38
IC1002
N.A. 37
R5F3650NCDFB
0
MC_BT_RTS 36
JL1027
N.A. 35
3.1
MC_BT_RXD0 34
3.2
MC_BT_TXD0 33
M_TX_OUT_DSP 0.1
BUSY/RTS1 32
DAMP_SDAO 0
SCD/CLK1 31
DAMP_SCLO 0
DIR_DO(MC_DIR_DI) M_RX_IN_DSP 30
DRIVE_RST 3.2
DIR_DI(MC_DIR_DO) 29
2.6
DIR_CLK 28
2.6
27
3.2
26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
CL1008
CL1010
R1037
47k
C1005
1M 0.1
6
R1032 R1107 R1008 R1038
100k 4.7k 100k 27k
3.2 3.2
S
Q1001
LSK3541FS8T2L
SWITCHING 7.2
R1039 1k
39 39
12 13 14
DB2S31100K8
RX_MUTE
Q1004
LTC014EUBFS8TL
3.4
INVERTER
0
DSP_SFLASH_HOLD
DSP_RESET
DSP_SPI_CS
R1055
R1047
100k
47
HDMI_SCL
R1048 47
HDMI_SDA
R1058 10k
R1049 100
PCONT_BT
R1062 100
BT_RESET
R1050 10k R1239 4.7k
R1059 100
ASEL_BT
R1240 4.7k
R1060
100
BT_CTS
R1069 100
DSP_RXD
R1051 R1063
4.7k 100
BT_TXD
R1064 100
BT_RXD
RTS1
SCO/CLK1
R1053 100 RXD1
R1054 100 TXD1
R1045 47 R1237 2.2k
D1004
R1042 R1052 R1061
DB2S31100K8
10k 47k 100
R1046 BT_RTS
47
R1238 DSP_TXD
2.2k
R1068
100
R1065
100
DIR_ER
DIR_ZERO
R1041
100k
Note: When IC1002 on the MAIN board is replaced, refer to "ABOUT THE PAIRING METHOD" on page 4.
HT-ST7
15 16 17 18
C1201
0.1
JL1012 JL1007
R1231
0
C1202
470
6.3V
FB1001
WL_INT
1
(Page 40)
2
3
>113S
MAIN
4
BOARD
5 (6/7)
6
7
WL_SDA
WL_SCL
WL_DET
WL_RST
RFDET_NFC
R1040
100
JL1039
1
JL1040
TXD1
2
JL1041
RTS1
3
JL1042
4
SCO/CLK1 R1095 100 JL1043
5 (NC)
RXD1 R1096 100 JL1044
6
CNVSS R1097 100 JL1045
7
JL1046
UCOM_RESET
8
R1098
100 9