Samsung YP-R1 Service Manual page 36

2450MHz
NC
C108
1
0.1nF
GND_1
2 OUT
GND_2
3
NC
ODBTPTR3015
GND
BT_REG_EN
32.768KHZ_OUT
R101
47K
REG_BT
BT_RST
X101
26.00MHz
GND
3
2
BT_WAKE
BT_UART_TX0
BT_UART_RX0
BT_UART_RTS0
BT_UART_CTS0
AUD_DATA_IN
AUD_DATA_OUT
AUD_BCLK
AUD_LRCK
2
U102
Samsung Electronics
CONNECT PIN 1 AND PIN 4
4
IN
F101
P_1.8V
For impedance matching
C108
L101
ANT101
8.2nH
0.1nF
1
15K
R107
2
15K
GND
GND
3
1% OK
4
1
R105
1K
32.768KHZ_OUT
4
REG_BT
1
GND
GND
BT_UART_RTS0
BT_UART_CTS0
 BLUETOOTH / FM, page 7-9
1
 MAIN PCB Bottom, page 6-3
CONNECT PIN 1 AND PIN 4
2450MHz
NC
U102
1
BCM2070CB0KUFBXG
GND_1
4
2 OUT
IN
GND_2
RES
G4
3
RFP
D1
F101
XIN
G2
XOUT
G3
NC
LPO_IN
A4
REG_EN
B2
VBAT
A3
GND
VREGHV
A2
VREG
A1
RST_N
B4
BT_REG_EN TM0
C4
TM2
F3
R101
47K
GPIO_0
B5
GPIO_1
B3
GPIO_5
E6
GPIO_6
E3
GPIO_7
B7
R105
UART_RXD
D8
BT_RST
UART_TXD
C8
UART_RTS_N
D7
UART_CTS_N
E8
GND
SCL
F7
SDA
E7
SPIM_CLK
A8
C7 SPIM_CS_N
PCM_IN
F6
G6 BT_WAKE PCM_OUT
PCM_CLK
F4
BT_UART_TX0
F5 PCM_SYNC
BT_UART_RX0
COEX_IN
B6
E4 COEX_OUT0
COEX_OUT1
E5
AUD_DATA_IN
AUD_DATA_OUT
AUD_BCLK
AUD_LRCK
U301
<Fig. 4-11>
SI4709-B-GMR
GND
R113
150
I2C_CLK0
R114
150
I2C_DAT0
P_1.8V
VSS_7
G7
VSS_6 A7
VSS_5
C6 15K
VSS_4 D3
R107
VSS_3
F2 G4
VSS_2 D2
D1
15K
GND
GND
VSS_1
C2 G2
1% OK
VDDO_3 G8
G3
VDDO_2
A6
VDDO_1 G5
A4
VDDC_3 F8
VDDC_2 B8
B2
VDDC_1 A5
A3
VDDPX G1
A2
VDDRF F1
A1
VDDLNA E1
VDDTF C1
1K
B4
VDDIF
B1
C4
F3
B5
GND
B3
E6
REG_BT
E3
GND
U601
B7
D8
C8
D7
E8
F7
 BLUETOOTH / FM, page 7-9
E7
A8
GND
C7
F6
G6
1
F4
C116 Should be placed
F5
close to VDDTF(C1)PIN.
B6
E4
E5
2
CON801
FMI trace as
short as possib
0.1nF
FM_ANT
Troubleshooting
FM_BUS_EN
GND
GND
U102
BCM2070CB0KUFBXG
2
REG_BT
RES
RFP
XIN
XOUT
GND
LPO_IN
VSS_7
VSS_6
REG_EN
CON601
VBAT VSS_5
P_3.0V
VSS_4
VREGHV
VREG VSS_3
VSS_2
VSS_1
RST_N
VDDO_3
TM0
VDDO_2
TM2
VDDO_1
VDDC_3
VDDC_2
GPIO_0
VDDC_1
GPIO_1
VDDPX
GPIO_5
VDDRF
GPIO_6
VDDLNA
GPIO_7
GND
VDDTF
UART_RXD
VDDIF
UART_TXD
C112/C124 Should be placed
UART_RTS_N
UART_CTS_N
close to VDDPX(G1)/VDDIF(
SCL
SDA
C113 Should be placed
SPIM_CLK
SPIM_CS_N
close to VDDLNA(E1)PIN.
PCM_IN
PCM_OUT
PCM_CLK
PCM_SYNC
COEX_IN
COEX_OUT0
COEX_OUT1
C116 Should
close to VDD
U501
4-21