Wlan - Nokia n81 Service Manual

RM-179; RM-223
System Module and User Interface
The FM radio is an integrated circuit, controlled by MCU software through a serial bus interface. The wires of
the headset are used as elements of the antenna, and no other antenna is needed for FM radio reception.
The FM radio is provided with VAUX (2V8).
The radio has an automatic band search function, which can search for a strong station.

WLAN

WLAN engine is divided into STLC4550 WLAN transceiver module and radio front-end module (FEM) RF5924.
STMicroelectronics Phaser STLC4550 is a three-die multichip module, partitioned to radio, baseband and
energy management die. STLC4550 is packaged to 8.5 mm x 8.0 mm x 1.4 mm 240-ball 0.5 mm pitch LFBGA.
STLC4550 implements 802.11b/g WLAN radio for embedded, low-power and small form factor mobile
applications. STLC4550 conforms to the IEEE 802.11b/g protocols operating in 2.4 GHz band supporting OFDM
data rates of 54, 48, 36, 24, 18, 12, 9, and 6 Mbps as well as CCK data rates of 11 and 5.5 Mbps and legacy
data rates of 2 and 1 Mbps. IEEE802.11e/i protocol extensions are included to implement quality of service
(QoS) and security functions.
STLC4550 has a fully integrated radio chip including a direct-conversion transceiver, RF synthesizer and VCO,
and high-speed data converters. Digital interface is used for transferring the sampled data between radio
and baseband chip. The baseband chip implements OFDM/CCK digital baseband processor and ARM9- based
MAC with internal SRAM memories. The baseband includes required logic and interfaces to enable time-shared
simultaneous use of BT and WLAN.
The energy management unit integrates required power management functions to operate the system from
VBAT (3.0 – 5.5 V). The EM unit generates 1.2 V digital core voltage, two 1.8 V supplies for RF and 2.8 V LDO
for PA bias supply. The EM unit also integrates power-on reset circuitry and level-shifters for RF front-end
GaAs switches.
Host interface is provided by a flexible serial interface (SPI) supporting clock frequency upto 48 MHz. The
maximum usable SPI clock rate depends on the host side clocking options and timing requirements. Typically
rates of 14 – 24 MHz are achieved. WLAN/BT coexistence interface enables automatic time shared usage of
WLAN and Bluetooth.
The system uses 38.4 MHz reference clock. In this device, a dedicated oscillator circuit for WLAN and bluetooth
reference clock is used. Low power sleep mode operation is enabled using 32768Hz low speed clock and
energy management stand-by state.
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