Schematic Diagram -Base Main Section (1/2) - Sony SPP-ID975 Service Manual

SPP-ID975/ID976
THIS NOTE IS COMMON FOR PRINTED WIRING
BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is
printed in each block.)
For schematic diagrams
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in Ω and
1 / W or less unless otherwise
4
specified.
• C : panel designation.
• U : B+ Line.
• Power voltage is dc 9 V and fed with regulated dc power
supply from external power voltage jack. (BASE PHONE)
• Power voltage is dc 12 V and fed with regulated dc power
supply from J1008 with 100 Ω in series. (BASE PHONE)
• Power voltage is dc 3 V and fed with regulated dc power
supply from battery terminal. (HANDSET)
• Voltage is dc with respect to ground under no-signal
condition.
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Signal path.
N : TX (To Tel Line)
O : RX (From Tel Line)
P : bell
For printed wiring boards
• X : parts extracted from the component side.
• : Carbon pattern.
• : Through hole.
z
• b : Pattern from the side which enables seeing.
(The other layer's patterns are not indicated.)
Caution:
Pattern face side: Parts on the pattern face side seen from the
(Side B) pattern face are indicated.
Parts face side: Parts on the parts face side seen from the
(Side A) parts face are indicated.
4-3. SCHEMATIC DIAGRAM — BASE MAIN SECTION (1/2) —
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