Onkyo DV-SP500 Service Manual page 25

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3 7 63 1515 0
ICs BLOCK DIAGRAM / TERMINAL DESCRIPTION
Q301 : PCM1742KE (Digital/ Analog signal converter)
Pin layout
1
BCK
2
DATA
3
LRCK
4
DGND
5
V
DD
6
V
CC
7
V
L
OUT
8
V
R
OUT
Block diagram
TE
L 13942296513
BCK 1
LRCK 3
DATA 2
ML 15
MC 14
MD 13
System Clock
SCK 16
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16
SCK
15
ML
14
MC
13
MD
12
ZEROL/NA
11
ZEROR/ZEROA
10
V
COM
9
AGND
Audio
Serial
Port
4´ / 8´
Oversampling
Digital Filter
with
Function
Controller
Serial
Control
Port
System Clock
Zero Detect
Manager
12
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8
Terminal Description
No.
Name
1
BCK
2
DATA
3
LRCK
4
DGND
5
V
DD
6
V
CC
7
V
L
OUT
8
V
R
OUT
9
AGND
10 V
COM
11 ZEROR/ZEROA
12 ZEROL/NA
13 MD
14 MC
15 ML
16 SCK
Q Q
3
6 7
1 3
DAC
Enhanced
Multi-level
Delta-Sigma
Modulator
DAC
Power Supply
11
5
9
u163
.
2 9
9 4
2 8
I/O
Pin Function
I
Audio data bit clock input
I
Audio data digital input
L-channel and R-channel Audio data
I
latch enable input
-
Digital ground
-
Digital power supply +3.3V
-
Analog power supply +5V
O
Analog output for L-channel
O
Analog output for R-channel
-
Analog ground
-
Common voltage decoupling
Zero flag output for R-channel / Zero
O
flag output for L/R-channel
Zero flag output for L-channel / No
O
assign
I
Mode control data input
I
Mode control clock input
I
Mode control latch input
I
System clock input
1 5
0 5
8
2 9
9 4
7
V
L
OUT
Output Amp and
Low-pass Filter
10
V
COM
Output Amp and
Low-pass Filter
8
V
R
OUT
6
8
m
co
DV-SP500
9 9
2 8
9 9

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