A
B
DVR-S100 SCHEMATIC DIAGRAM (OPERATION)
1
2
5.0
3.6
-0.1
0
3
~
~
~
~
~
~
CPU
~
~
~
~
~
~
~
4
~
~
~
~
~
~
~
~
~
~
~
~
5
6
7
8
9
C
D
E
Page 101
E7
to MAIN (1)
-0.1
3.2
-0.1
-0.1
-0.1
0
0
0
0
3
1.2
3.2
3.2
3.2
~
~
~
3.0
3.2
~
FL DISPLAY
F
G
H
Page 101
G1
to MAIN (1)
5.0
3.7
3.7
0
0
5.0
~
~
5.0
~
~
5.0
~
~
~
~
~
~
~
FL DRIVER
~
~
~
~
~
~
-30.0
~
~
~
-30.0
~
~
~
~
~
~
~
~
~
~
~
~
~
~
FL DISPLAY
Point 3 Pin 9 of IC600
x: NOT USED
O: USED / APPLICABLE
I
J
IC601: LC75712E FLD
FL Display Driver
DI
64
C
O
L
N
DC
A
CL
63
T
SHIFT REGISTER
T
R
C
RAM
O
H
L
CE
62
ADDRESS
ADDRESS
VDD
60
REGISTER
COUNTER
VSS
57
BLINKCYCLE
BLINK
REGISTER
GENERATOR
VFL
55
DISPLAY
DISPLAY
REGISTER
CONTROL
RES
61
DUTYCYCLE
DUTY
REGISTER
GENERATOR
TEST
56
GRID
GRID
REGISTER
CONTROL
INSTRUCTION
CONTROL
DECODER
OSCI
59
TIMING
OSC
DIVIDER
OSCO
58
GENERATOR
~
5.0
~
~
5.0
~
~
# All voltages are measured with a 10MΩ/V DC electric volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
K
L
DVR-S100/NX-SW100
CG
1
AM1
ROM
A
2
AM2
N
O
D
L
E
A
CG
T
D
C
RAM
R
H
I
V
E
35
AM35
R
AA1
AD
36
RAM
37
AA2
38
AA3
AA4/G16
39
40
AA5/G15
41
AA6/G14
42
AA7/G13
43
AA8/G12
44
G11
45
G10
D
G
R
E
C
I
D
O
D
D
E
R
R
I
V
E
R
G2
53
54
G1
105