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MDS-S9
Pin No.
Pin Name
32
XINT
33
BEEP
34
LRCKI
35
WRPWR
36
I2CCLK
37
I2CDAT
38
SWDT
39
VCC
40
SRDT
41
VSS
42
SCLK
43
REC-SW
44
TX0 (CLIP)
45
RX0 (CLIP)
46
CLK (CLIP)
47
DIG-RST
48
SENS
49
PLAY-SW
50
XLATCH
51
OUT-SW
52
RDY
53
ALE
54
HOLD
55
HLDA
56
MNT2 (XBUSY)
57
VSS
58
MNT1 (SHOCK)
59
VCC
60
EEP-WP
61
SDA
62
BCLK
63
OE
64
BHE
65
WE
66
SCL
67
REFLECT SW
68
PROTECT SW
69 to 71
CS0 to CS2
72, 73
A20, A19
74
VCC
75
A18
50
I/O
I
Interrupt status input from the CXD2662R (IC151)
Beep sound drive signal and headphone muting on/off control signal output terminal
O
Not used (open)
O
L/R sampling clock signal (44.1 kHz) output to the CXD2662R (IC151)
Laser power selection signal output to the CXD2662R (IC151) and HF module switch circuit
O
"L": playback mode, "H": recording mode
I/O
Serial data transfer clock signal input/output terminal for the IIC bus
I/O
Serial data input/output terminal for the IIC bus
O
Writing serial data signal output to the CXD2662R (IC151)
—
Power supply terminal (+3.3V)
I
Reading serial data signal input from the CXD2662R (IC151)
—
Ground terminal
O
Serial data transfer clock signal output to the CXD2662R (IC151)
Detection signal input from the recording position of over write head (HR901) detect switch
I
(S105) "L" recording mode
O
Serial data output to the CXD2662R (IC151)
I
Serial data input
O
Bit clock signal (2.8224 MHz) output to the CXD2662R (IC151)
O
Reset signal output to the CXD2662R (IC151) and BH6519FS (IC141) "L": reset
I
Internal status (SENSE) input from the CXD2662R (IC151)
Detection signal input from the playback position of over write head (HR901) detect switch
I
(S104) "L" playback mode
O
Serial data latch pulse signal output to the CXD2662R (IC151)
Detection signal input from the loading-out detect switch (S103)
I
"L" at a load-out position, others: "H"
O
Not used (open)
O
Not used (open)
O
Not used (open)
O
Not used (open)
I
Busy monitor signal input from the CXD2662R (IC151)
—
Ground terminal
I
Track jump detection signal input from the CXD2662R (IC151)
—
Power supply terminal (+3.3V)
O
Writing protect signal output to the EEPROM (IC195)
I/O
Two-way data bus with the EEPROM (IC195)
O
Not used (open)
O
Data reading strobe signal output to the flash memory "L" active Not used (open)
O
Not used (open)
O
Writing enable signal output to the flash memory "L" active Not used (open)
O
Clock signal output to the EEPROM (IC195)
Detection signal input from the disc reflection rate detect switch (S102-1)
I
"L": high reflection rate disc, "H": low reflection rate disc
REC-proof claw detection signal input from the protect detect switch (S102-2)
I
"H": write protect
O
Chip select signal output to the flash memory "L" active Not used (open)
O
Address signal output to the flash memory Not used (open)
—
Power supply terminal (+3.3V)
O
Address signal output to the flash memory Not used (open)
Description
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