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QQ
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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-4
Q201 : D707E001RFP250 (32 bit Floating-Point Digital Signal Processor)-4/7
TERMINAL DESCRIPTION (1/4)
SIGNAL NAME
EM_A[0]
EM_A[1]
EM_A[2]
EM_A[3]
EM_A[4]
EM_A[5]
EM_A[6]
EM_A[7]
EM_A[8]
EM_A[9]
EM_A[10]
EM_A[11]
EM_BA[0]
EM_BA[1]
EM_CS[0]
EM_CS[2]
TE
L 13942296513
EM_CAS
EM_RAS
EM_WE
EM_CKE
EM_CLK
EM_WE_DQM[0]
EM_WE_DQM[1]
EM_OE
EM_RW
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PIN
TYPE
PULL
NO.
External Memory Interface (EMIF) Address and Control
91
O
89
O
88
O
86
O
84
O
83
O
80
O
79
O
76
O
75
O
93
O
74
O
96
O
94
O
97
O
100
O
37
O
98
O
38
O
71
O
70
O
39
O
67
O
104
O
102
O
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2 9
8
GPIO
DESCRIPTION
-
N
-
N
-
N
-
N
-
N
-
N
-
N
EMIF Address Bus
-
N
-
N
-
N
-
N
-
N
-
N
SDRAM Bank Address and Asynchronous Memory
-
N
Low-Order Address
-
N
SDRAM Chip Select
Q Q
-
N
Asynchronous Memory Chip Select
3
6 7
1 3
1 5
-
N
SDRAM Column Address Strobe
SDRAM Row Address Strobe
-
N
SDRAM Write Enable
-
N
SDRAM Clock Enable
-
N
SDRAM Clock
-
N
Write Enable or Byte Enable for EM_D[7:0]
-
N
Write Enable or Byte Enable for EM_D[15:8]
-
N
SDRAM Output Enable
-
N
Asynchronous Memory Read/not Write
-
N
co
.
TX-SR504/504E/8450
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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