Sanyo PLC-XF70 Service Manual page 150

IC Block Diagrams
● HD6417727F <CPU[SH3], IC801>
Super H
CPU CORE
CASH ACCESS
CONTOROLLER
(CCN)
BUS STATE
CONTROLLER
(BSC)
REAL TIME
CLOCK
(RTC)
512byte
SRAM
LI BUS STATE
CONTROLLER
(LBSC)
SRAM
(XY RAM) DSP CORE
CPU/DSP DATA
DIRECT MEMORY
USER
BRAKE
CONTOROLLER
CONTROLLER
(UBC)
INTERNAL BUS(I_CLOCK)
SERIAL
TIMER
SMART CARD
(TMU)
(SCI)
PERIPHERAL BUS (P_CLOCK)
PERIPHERAL BUS2 (P2_CLOCK)
ANALOG
FRONT END
INTERFACE 128byte
(AFEIF) SRAM
LI BUS (B_CLOCK)
2.4K byte
LINE BUFFER
LCD CONTROLLER
SRAM
(LCDC)
MEMORY
MANAGEMENT
UNIT
(MMU)
CPU BUS (L BUS.... I_CLOCK)
INTERACTIVE
ACCESS
CONTOROLLER
(INTC)
(DMAC)
SERIAL
COMMUNICATION
INTERFACE
(SCIF)
PERIPHERAL BUS
CONTOROLLER
AUDIO
PC CARD
CODEC
CONTROLLER
INTERFACE
(PCC)
(SIOF)
512 byte
PALLET
SRAM
-150-
CASH
MEMORY
INTERNAL
USER DEBUG
OSCILLATION
INTERFACE
CIRCUIT
(H-UDI)
( CPG)
INTERNAL BUS2 (I2_CLOCK)
D/A
A/D
CONVERTER
CONVERTER
(DAC)
(ADC)
PERIPHERAL BUS1 (P1_CLOCK)
USB
FUNCTION
CONTROLLER
288byte
(USBF)
SRAM
USB HOST CONTROLLER
(USBH)