Yamaha CDR-HD1500 Service Manual page 46

A B
CDR-HD1500
SCHEMATIC DIAGRAM (MAIN 2/2)
1
2.7 2.5 4
5.1
OPTICAL
0
DIGITAL
2
OUT
6
COAXIAL
2.6
5.1
0
OPTICAL
4.0
DIGITAL
IN
2.7 2.7
3
13 12
COAXIAL
0
0
4
5
6
7
8
9
46
C D E
3 2.5
5.1
14
2.5
5
7
0
5.1
5.1
8
5
14
4 0
5.1
0 5 6 7
6 2.3
7 4
0
0
4.0 1
8
5.1 10 0 0 2
2 0.1
1 0
9
3
5.1
2.7 2.7 11
11 10 9 0 0 0 13 5.1
8 3.0 0
12
0
ANALOG OUT
(DIGITAL)
F G
DIR
0
5.1 2.5
3.4 0
3.4
0 5.1
5.1
0 5.1
5.1 0
5.1 5.1
0 5.1
2.6 0
2.4
0
5.1 0
0 2.5
2.5 2.5
IC200: TC74HCU04AFEL IC201: HD74HC02FPEL IC202: NJM2904M
Hex Inverters Quad 2 Input NOR Dual OP-Amp
Y1 1 14 VCC
1A 1 VCC
14
A1 2 13 Y4
1Y 2 13 6A
B1 3 12 B4
2A 3 12 6Y
Q2 Q3
Y2 4 11 A4
– Q1 Q4
2Y 4 11 5A
A2 5 10 Y3
INPUTS
3A 5 10 5Y
B2 6 9 B3
3Y 6 9 4A
GND 7 8 A3 +
GND 7 8 4Y
Q8 Q9
IC205: NJM4580E IC206: TC4052BF
Dual OP-Amp Analog Multiplexers/Demultiplexers
VDD
V+
16
8
2, 6 OUTPUT
A 10
–INPUT
+INPUT 1, 7
3, 5
9
B
6
INH
V–
4
8
VSS
IC208: YSD917
DIR
AVDD 1 28 SCK
PCO SI 22 2 10 9 11 4
2 27
AVSS 3 26 SO
M/S 4 25 /CS
DDIN 5 24 VDD Reference
TEST 6 23 INT clock
DDIN Clock Output
5
/IC 7 22 /LOCK PLL generation system clock
VSS 8 21 ERR/BS selection generation
XO 9 20 DBL/V
XI 10 19 FS128/C
MCK 11 18 SYNC/U
VDD 12 17 VSS
SDO 13 16 SDMCK
SDBCK SDWCK
14 15
DATA BUS Flame Serial
Buffer Converter
Each control signal
Microprocessor Channel Status Interrupt factor
interface User Data
/IC 7
26 25 27 28
H I
2.6
5.1 0
8 5 2.6
4
3
2.6 7
2.6 1
0 0
6 3 4
2.6 2
2 0
2.6
5 0
1 0
BUFFER
MIXER
2.6
0 0
2.6 6 13 11
2.6
2 7
2.6 15 0
1
0
4 5 2.6 14
3 2.6
5.1 8 0 12 0
24 BIT
CODEC
0 6
7 0
5
0
0 8
-4.9 -4.9
5.1
0
LPF
MUTE
0 2
1 0
3
0
0 4
-4.9 -4.9
-5.0
0
-4.9 -4.9
0 -4.9
-4.7
0
IC203~204: NJM2100M
Dual OP-Amp
V–
V+
8
Q6
Q5 2, 6
OUTPUT
–INPUT
Q7
1, 7
+INPUT
3, 5
OUTPUT
Q13
Q11
V–
Q12
4
Q10
13 X-COMMON
I/O c O/I 12 0X
14
I/O c O/I 1X
I/O c O/I 15 2X
I/O c O/I 11 3X
1 0Y
I/O c O/I
I/O c O/I 5 1Y
I/O c O/I 2 2Y
4
I/O c O/I 3Y
3 Y-COMMON
7
VEE
IC210: AK4528VF
24bit CODEC
23 VD
22 VT
24 DGND
AINL+ 4
PDN
19
AINL- 5
16 SDMCK ADC HPF
AINR+ 2
AINR- 3
SDBCK 11 LRCK
14
Audio
12 BICK
15 SDWCK
I/F
VCOM 1 SDTO
13
Controller
14 SDTI
AOUTL+ 26
SYNC/U
18 AOUTL- 25
Output ADC HPF
19 FS128/C AOUTR+
28
selection
20 DBL/V
AOUTR- 27 DEM0
20
ERR/BS
21
21 DEM1
VREF 6
VA 8 Control Register I/F Clock Divider
AGND 7
13 SDO
9 17 16 15 10 18
P/S CSN CCLK CDTI MCLK DFS
(DIF) (CKS1) (CKS0)
detection
23
J K
Page 47 H7
to OPERATION (1)
ANALOG L / R
IN
ANALOG L / R
OUT
0
0
0
0
ANALOG OUT
Page 48 I8
to OPERATION (4)
PIN CONNECTION DIAGRAM OF TRANSISTORS,
DIODES AND ICS.
2SC2412K 1SS355 PST572CMT-R NJM2100M SN74LS06NST-EL
2SD1938F MA732 NJM2904M
DTC114EKA MA8051-M NJM4580E
DTA143EK
Anode
C 3
1
E 7
8 4 14
2
B
1
1
Cathode
HD74HC02FPEL TC4052BF YSD917 AK4528VF
TC74HC14AF TC9246F-TEL
TC74HCU04AFEL
14 14
7 8
28 28
14 16
1 1
1 1
GLT44016 MSM5118160F-60JSR1 MBM29F800BA-70PFTN
25 24
20
21
40 48 1
42
1
1
HD6417014F28 YDC126-F
84 57 120 81
85 56 121 80
112 29
160 41
1 28 1 40
# All voltage are measured with a 10MΩ/V DC electric volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
L