Atari ST series Technical Reference Manual page 313

Table F-4. Control Register Values for Timers C and D
Timer C Timer D
Value Value
48 3
64 4
80 5
96 6
112 7
Registers 16-19. Timers A-D Data Registers (TADR,
TBDR, TCDR, and TDDR). The four timer data registers are
used to store the countdown value for the interval counter.
Register 20. Synchronous Character Register (SCR). In
synchronous transfer mode, all data characters received are
stored in the SCR as well as the receive buffer, which signals
the application when a character has been received.
Register 21. US ART Control Register (UCR). This regis­
ter is used to set the serial interface communications parame­
ters as shown in Table F-5.
Table F-5. USART Control Register (UCR)
Bit
0 Not used.
1 Parity type.
0 = Odd.
1 = Even.
2 Parity enable.
0 = Off.
2 = On.
3-4 Async start and stop bits.
Bits
4 3 Number of Start and Stop Bits
0 0 No start or stop bits (synchronous).
0 1 1 start bit, 1 stop bit.
1 0 1 start bit, IV
I l l start bit, 2 stop bits.
5-6 Data bits per word.
Bits
5 6 Number of data bits
0 0 8 bits.
0 1 7 bits.
1 0 6 bits.
1 1 5 bits.
The MFP Chip
Timer Mode
Delay mode, clock divided by 16
Delay mode, clock divided by 50
Delay mode, clock divided by 64
Delay mode, clock divided by 100
Delay mode, clock divided by 200
Function
stop bits.
2
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