Sony DSR-PD150P Service Manual page 87

DSR-PD150/PD150P
For Schematic Diagram
• Refer to page 4-51 for printed wiring board.
• Refer to page 4-114 for waveform.
2 3 4
1
VC-242D BOARD(4/18)
A
RS-232C I/F STILL CONTROL
(MS-2 BLOCK)
-REF.NO.:10000 SERIES-
XX MARK:NO MOUNT
NO MARK:REC/PB MODE
R :REC MODE
P :PB MODE C1402
1u B
B
C1403
1u B
C1404
1u B
C
FB1401
43
TO(15/18) IF_232C_RD
85 TO(9/18,
LANC_GND/232C_TD
15/18)
44 TO(18/18) XDS_FLASH
D
36
TO(3/18) XSYS_RST
IC1402
BUFFER
E
F
G
H
45
TO(10/18,11/18, XHI_SCK
HI_SO
12/18,13/18,
HI_SO
15/18,18/18)
XCS_SH
46
TO(15/18) XCS_DS
I 47 HI_SI
HI_SI
TO(10/18,12/18,
13/18,15/18)
XSH_WAKE_UP
XDS_WAKE_UP
232C_ON
48
TO(15/18) 232C_ON
DS_BUSY
XEEP_SCK
EEP_DI
EEP_DO
J
49
TO(18/18) A_LED_ON
K
L
VFI_VD
31
TO(3/18)
VFI_OE
M
16
RS232C I/F, STILL CONTROL
VC-242D (4/18)
5 6 7 8
IC1404
R1446
R1444
47k 47k
RS232C
I/F
IC1404
UPD4721GS-GJG-E2
C1405
1u B
3.2 3.2
VDD
C4+
3.2
GND
C1+
3.2 0
VCC C4-
0 0
C1- VSS
3.2 0 232C_ON
STBY
C3+
C1406
0 3.2
C3- VCHA 1u B
3.2 0
D_IN1 D_OUT1
D_IN2 D_OUT2
3.2 0
R_OUT1 R_IN1
R_OUT2 R_IN2
CL1401
IC1402
TC7S08F(TE85R)
2.4 3.2
3.2
2.8
R1404
47k
120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97
3.2
J-ACK
NC
GND
A0
0
A0
A1
0
A1
A2
0
A2
A3
0
A3
A4
0
A4
A5
0
A5
A6
0
A6
A7
0
A7 IC1401
A8
0
A8
A9
0
DIGITAL
A9
A10 STILL
0
CONTROL
A10
IC1401
A11 HD6437044P13XSZ
A12
0
232C_COM
3.2
XEEP SCK
3.2
XEEP DI
0
XEEP DO
3.2
VCC
C1401
0.1u B 0
LED ON
GND
0
XRAS
XRAS
XCASL 0
XCASL
XCASH 0
XCASH
GND
XDWR 3.2
XDWR
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
R1402 R1403
470k
470k
R1401
100k
4-19
9 10 11 12
D_2.8V
REG_GND
R1450
100k
IC1412
SHUTTER
SOUND
IC1412
C1427 R1455
ML2201-100MBZ060
0.1u 56
3.2 3.2 B
RESET
DI
3.2 C1428
XT
10u
CI
1.1 6.3V P
XT
SPCK
GND
1.7 2.6
VDD
AOUT
R1447
C1426
1k
0.1u
B
KASHAON
C1424
0.01u
B
GND
C1407
0.1u
FB1403
B
C1412
10u
6.3V
P
96 95 94 93 92 91
R1411 R1412
47k
R1406 C1410
470p CH
270
1608
3.2
RESET
1.3
CK
R1405
C1411
2700 0.1u B
PLLVSS
R1410
18
PLLCAP R1409
180
2.0
PLLVCC
3.1
GND
R1408 470k
MD1
3.0
VCC
3.2 R1407 0
NMI
3.1
25
VCC 3.1 0
3.2
EXTAL
0
MD3
XTAL
0
GND
D0
X1401
Q1401
7.375MHz
D0 UN9213J-(K8).SO
D1
3.0
D1 INV.
D2
3.0
D2
D3
3.0
D3
D4
3.0
D4
3.0
VCC CL1402 (TXD)
D5
3.2
CL1403
D5 (RXD)
D6
3.0
D6 CL1404 (MD1)
D7
3.0
D7 CL1406 (RESET)
3.0
CL1407
VSS (GND)
D8
D8
D9
3.2
IC1405
D9
D10
TC7W125FU-TE12R
3.2
D10
D11
3.2
D11
G1-
3.2 2.8
A!
3.2
Y2
GND
IC1405
BUFFER
C1413
0.1u
B
13 14 15 16 17
153
TO(18/18)
38
TO(3/18)
50
TO(16/18)
<CONTROL:MSEL,START>
<ADDRESS BUS 0-17>
<DATA BUS 0-15>
47k
R1413
0
3.2
2.7
0
0
Q1402
UN9213J-(K8).SO
INV.
R1414
D0
100k
R1415
100k D1
R1416
100k D2
R1417
100k D3
R1418
100k D4
R1419
100k D5
R1420
100k D6
R1421
100k D7
R1422
D8
100k
R1423
100k D9
R1424
XCS_SH 100k D10
R1425
100k D11
R1426
100k D12
R1427
2.7 D13 IC1406
Vcc 100k
R1428
2.7
100k D14
G2-
R1429 R1437 EEPROM
HI_SI
100k D15
Y1 100k
2.3
A2
R1430 IC1406
2.7
100k XWRH AK6440BH-E2
R1431
XRD XEEP_CS
100k VCC
R1432
XCS
100k XWR XEEP_SCK
NC
R1433 XSCK
100k XRAS EEP_DI 3.2
RST
R1434
DI
EEP_DO 3.2
100k XCASL GND
R1435
DO
0
100k XCASH
R1436
XDWR EEP_RST
100k
<CONTROL:READ,WRITE,RAS,CAS>
4-20
18 19 20
XSTART
XSTART
MSEL
MSEL
JPEG_XCS
JPEG_XCS 29
TO(3/18)
CARILLON_XCS
CARILLON_XCS
XIRQ2
XIRQ2
MS_VCC_ON 25 TO(5/18)
ACK
27
TO(3/18)
REQ
MS_IN 24
TO(5/18)
JRST 28
TO(3/18)
D0
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
17
TO(3/18,5/18)
D7
D8
D8
D9
D9
D10
D10
D11
D11
D12
D12
D13
D13
D14
D14
D15
D15
CK1 23
TO(3/18,5/18)
MS_3.1V 30
TO(3/18,5/18)
VDD1 26
TO(3/18)
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5 18 TO(5/18)
A6
A6
A7
A7
A8
A8
A9
A9
A10
A10
A5
A4
A3
19
TO(3/18)
A2
A1
A0
A0
S_INT
S_INT
MS_XRST
MS_XRST
S_REQ
S_REQ 20
TO(5/18)
S_ACK
S_ACK
NS_XCS
NS_XCS
XWRH
XWRH
3.2
XWR
XWR
XRD
21
TO(3/18,5/18)
C1415 XRD
0.1u
B
R3.2/P0
XRD
XCASH
XCASH
XDMR
XDMR 16
TO(5/18)
XCASL
XCASL
XRAS
XRAS