Semiconductors; Ic's - Denon AVR-E300 Service Manual

SEMICONDUCTORS

Only major semiconductors are shown. Genaral semiconductors etc. are omitted from list.
The semiconductors which have a detailed drawing in a schematic diagram are omitted from list.
Package Markings Temp Rating (° C)
EN5339 -40 to +85
EN5339

1. IC's

Information: http://www.enpirion.com/resource-center-packing-and-marking-information.htm
EN5339QI (DIGITAL : IC751~154)
NOTE A: NC pins are not to be electrically connected to each other or to any external signal, ground, or voltage.
However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage.
NOTE B: Grey area highlights exposed metal on the bottom of the package that is not to be mechanically or electrically
connected to the PCB. There should be no traces on PCB top layer under these keep out areas.
Figure 3: Pin Out Diagram (Top View)
NOTE C: White 'dot' on top left is pin 1 indicator on top of the device package.
EN5339QI
Terminal Functions

PIN NAME
NAME FUNCTION
NO CONNECT: These pins are internally connected to the common switching node of the
1, 21-24 NC(SW)
internal MOSFETs. They must be soldered to PCB but not be electrically connected to any
NC(SW)
external signal, ground, or voltage. Failure to follow this guideline may result in device
damage.
Input and output power ground. Connect these pins to the ground electrode of the input and
PGND output filter capacitors. See VOUT, PVIN descriptions and Layout Recommendation for more
details.
2-3, 8-9 PGND
Regulated converter output. Connect to the load and place output filter capacitor(s) between
VOUT
these pins and PGND pins 7 and 8. See layout recommendation for details
TST2 Test Pin. For Enpirion internal use only. Connect to AVIN at all times.
TST1 Test Pin. For Enpirion internal use only. Connect to AVIN at all times.
4-7 VOUT
10 TST2
11 TST1
PIN NAME
12 TST0
Enpirion 2012 all rights reserved, E&OE
06903
13 NC
14 VFB
15 AGND
16 AVIN
17 POK
18 ENABLE
19-20 PVIN
25,26 PGND
Package Description
24-pin (4mm x 6mm x 1.1mm) QFN T&R
QFN Evaluation Board
Figure 3: Pin Out Diagram (Top View)
FUNCTION
NO CONNECT: These pins are internally connected to the common switching node of the
internal MOSFETs. They must be soldered to PCB but not be electrically connected to any
external signal, ground, or voltage. Failure to follow this guideline may result in device
damage.
Input and output power ground. Connect these pins to the ground electrode of the input and
output filter capacitors. See VOUT, PVIN descriptions and Layout Recommendation for more
details.
Regulated converter output. Connect to the load and place output filter capacitor(s) between
these pins and PGND pins 7 and 8. See layout recommendation for details www.enpirion.com, Page 2
March 30, 2012
Test Pin. For Enpirion internal use only. Connect to AVIN at all times.
Test Pin. For Enpirion internal use only. Connect to AVIN at all times.
FUNCTION
Test Pin. For Enpirion internal use only. Connect to AVIN at all times.
NO CONNECT: This pin must be soldered to PCB but not electrically connected to any other
pin or to any external signal, voltage, or ground. This pin may be connected internally. Failure
to follow this guideline may result in device damage.
This is the external feedback input pin. A resistor divider connects from the output to AGND.
The mid-point of the resistor divider is connected to VFB. A feed-forward capacitor is
required parallel to the upper feedback resistor (R
on the VFB node voltage equal to 0.600V.
The quiet ground for the control circuits. Connect to the ground plane with a via right next to
the pin.
Analog input voltage for the control circuits. Connect this pin to the input power supply (PVIN)
at a quiet point. Decouple with a 1uF capacitor to AGND.
POK is an open drain output. Refer to Power OK section for details. Leave POK open if
unused.
Output Enable. A logic high level on this pin enables the output and initiates a soft-start. A
logic low signal disables the output and discharges the output to GND. This pin must not be
left floating.
Input power supply. Connect to input power supply and place input filter capacitor(s) between
these pins and PGND pins 2 to 3.
Not a perimeter pin. Device thermal pad to be connected to the system GND plane for heat-
sinking purposes. See Layout Recommendation section.
EN5339QI
Rev: A
March 30, 2012
114
www.enpirion.com, Page 2
). The output voltage regulation is based
A
EN5339QI
Rev: A