Motorola APX 7000 Detailed Service Manual page 68

3-44
3.2.4.7 Double Data Rate (DDR) Memory (U6301)
The 32MB DDR Synchronous DRAM IC is interfaced to the OMAP using 13 address bits and a 16bit
data bus. The DDR IC is driven by a complementary clock signal originating from the OMAP IC. The
DDR clock is initialized to 96MHz by the OMAP boot code. Additional control signals are also
dedicated for the DRAM interface, as illustrated in
VOCON Memory Interface Circuits" on page 8-279
VOCON Memory Interface Circuits" on page 8-280
3.2.4.8 Secure Digital (SD) Interface
The OMAP processor SD interface is used for removable memory devices. The removable memory
socket resides on the Expansion Board. The VOCON is connected to the Expansion board through
connector J4001.
3.2.4.9 Removable Memory
The MMC2 interface on the OMAP processor is configured as a Secure Digital interface used for the
removable memory modules. The removable memory modules use a 10bit interface, which include 4
bit wide bi-directional data bus, command line, clock and three direction control bits. The direction
control bits enable the OMAP SDIO interface to utilize a voltage translator IC, located on the
expansion board that bridges the signals to the actual removable memory device. The SDIO signals
are conveyed to the expansion board via J4001. The expansion board houses a removable memory
socket (J2101) which is compatible with MicroSD flash devices. See
Removable Memory
Troubleshooting Diagram
Click on each test point to
see signal
T t P i t D i ti
EXPANSION BOARD
3.0V
Voltage
Regulator
MAKO
VOCON BOARD
Note: Signals can only be probed
B d O l
Figure 3-33. Removable Memory Outline
Figure 8-126. " MNCN6200A/MNCN6201A
Figure 8-127. " MNCN6202A/MNCN6203A
and
schematics.
REMOVABLE
MEMORY CARD
SDIO
FET
Level
switch
Translator
CPLD OMAP
in Analysis Fixture
Theory of Operation
: Controller
Figure 3-33 for details.
3.0V logic
D3
1
2 D2
D1
3
4 D0
5 CMD
CLK
6
1.875 Logic
MMC2_CMD
7
MMC2_D3
8
MMC2_D2
9
MMC2_D1
10
MMC2_D0
11
MMC2_CMD_DIR
12
MMC2_D1_DIR
13
MMC2_D0_DIR
14
MMC2_CLKFB
15
MMC2_CLK
16