Memory Segmentation Model - IBM XT 5160 Technical Reference

Memory Segmentation Model
7 0
FFFFF
Logical Memory Space
Data Segment
Code Segment
Extra Data
Segment
XXXXO
}Stack Segment
t
64KB
~
i
~
Displacement
15 0
Offset
Address
word{
I I
MSB
15 ;
0
I
I
LSB
Selected CS
0000
BYTE
Segment
SS 0000
Register DS 0000
CS,SS,DS,ES
or none l
for I/O, INTI
Adder
00000
9 Physical
Address
Latch
Instruction Set
6-5