Memory Segmentation Model; Use Of Segment Override - IBM 5150 Technical Reference

Memory Segmentation Modal
7 0
J..,..-.........
1
FFFFFH
Logical
Memory Space f
Code Segment
6!B
1
XXXXOH
"'
~
} ,,",k
_mo.'
DisPlac~me;
I ..
15 0
...
Offset
I I
:1:
~i::
Addre ss
I-­
,
r---:
,
I
MSB
15 ' 0
I
I
Word {
LSB
}o"..
o.mo.,
~
Selected CS
0000
BYTE
Segment 55
0000
~
. .
Register
OS
10000
..
CS. 5S. OS. ES
ES
00
:
~
or none
f-----'
I
for I/O.INT
,
I
Extra Data
I
.1
}
Segment
: Adder
I
,..,
I
~
I
..
I
or;;
,
r
OOOOOH
"t
I
19
-: 7
0
Physical
L
Address
Latch
Segment Override Prefix
I
0 0 1 reg 1 1 0
I
Use of Segment Override
Operand Register Default With Override Prefix
IP (Code Address)
CS Never
SP (Stack Address)
SS Never
BP (Stack Address or Stack Marker)
SS
BP
+
DS or ES, or CS
SI or DI (not including strings) DS ES, SS, or CS
SI (implicit Source Address for Strings) DS ES, SS, or CS
DI (Implicit Destination Address for Strings)
ES
Never
Instruction Set 6-5