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7-1. BLOCK DIAGRAM — BD SECTION —
DETECTOR
D +3.3V
A
B
C
D
F
E
OPTICAL PICK-UP
BLOCK
(KSM-215CFP)
LASER DIODE
AUTOMATIC
POWER
CONTROL
Q10
PD
LD
MOTOR/COIL DRIVE
CH4OUTF
16
M101
M
CH4OUTR
(SPINDLE)
15
CH3OUTF
17
M102
M
CH3OUTR
(SLED)
18
2-AXIS
DEVICE
CH1OUTF
14
CH1OUTR
13
CH2OUTF
12
CH2OUTR
11
CX-LDB30/LDB50
CD DSP
IC101 (1/2)
A
AC_
EQ_
26
RF
SUM
IN
RFACO
RFAC
SUMMING
34
35
EQ
B
VCA
AMP
27
C
28
FOCUS
FEO
ERROR
24
D
AMP
29
F
20
TEO
TRACKING
E
22
19
ERROR AMP
LD
APC LD
PD
37
36
AMP
IC251
OPOUT
CH4IN
OPIN+
MOTOR
24
27
2
DRIVE
21 23
CD DSP
IC101 (2/2)
CH3FIN
23
MOTOR
A/D
CH3RIN
DRIVE
CONVERTER
22
SFDR
FOCUS/
9
TRACKING/SLED
SRDR
10
SERVO DSP
CH1FIN
TFDR
4
11
COIL
CH1RIN
TRDR
DRIVE
5
12
FFDR
13
FRDR
14
CH2FIN
6
COIL
CH2RIN
DRIVE
7
MUTE
20
7
S101
(LIMIT)
FILTER
51 53
50 52
112
RFACI
EFM
ASYMMETRY
41
DIGITAL PLL
42
DEMODULATOR
CORRECTOR
ASYI
45
ASYO
46
TO SERVO AUTO
SUBCODE
SEQUENCER
PROCESSOR
DIGITAL
CLV
CPU INTERFACE
PROCESSOR
6
100
102 105 104
107
115
98 99
96 97
35 37 36
56 19
I-MP3DAT 6
O-MP3DAT 5
O-MP3CLK 7
I-MI-CS 47
O-MILT 48
I-MP3-ACK 32
I-MP3-REQ 33
I-MP3-STBY 49
MP3-RST 45
I-XTACN 57
FOK
3
MIRR,
LD OUT
MIRR
DFCT, FOK
1
LD IN
DFCT
DETECTOR
2
SYSTEM CONTROLLER
COUT
IC901 (1/2)
119
SERVO
SCLK
INTERFACE
108
SERVO AUTO
SEQUENCER
TO CPU INTERFACE
I-CDMSW1
60
O-X-RST
I-CDMSW2
I-CDMSW3
25
25
117
93
XTSL
XTAO
CLOCK
XTAI
GENERATOR
XTACN
AOUT1
D/A
CONVERTER
AOUT2
32K
D/A
RAM
DIGITAL
INTERFACE
ERROR
CORRECTOR
SELECTOR
110 111 113 68
69
63 66 65
62 60 61
MP3 DECODER
IC301
19 18
16 15
14
11
6
MIDIO
7
MICK
VDDP 1
4
MICS
VDD 21
5
MILP
VDDX 40
8
MIACK
VDDX 57
36
PO11/BUCK/AD14
STANDBY
3
2
RESET
42
9
IC303
1
+1.5V REG
MP3
3.3V
IC701 LOADING MOTOR DRIVE
7
FIN
OUT1
4
82
M701
M
(LOADING)
83
9
RIN
OUT2
2
S701 (DISC IN/OUT)
S701
(ON : When disc insert)
85
S702
(ON : Play position)
S702 (CHUKING)
86
(ON : Play position)
S703
S703 (TRIGGER)
84
CX-LDB30/LDB50
77
X171
16.9344MHz
78
95
CD
MAIN
A
81
SECTION
86
R-CH
5
• R-ch is omitted due to same as L-ch
• Signal Path
: CD PLAY
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