Table of Contents
Advertisement
Image Processing
The following figure shows the various image processing blocks that operate on the captured
video data stream. Each block is individually selectable and can be removed from the
processing chain via a selectable bypass path. When a processing block is bypassed, it
automatically enters a low power mode to help reduce overall power consumption.
Figure 8-12 Imange Processing Block Diagram
Faroudja DCDi Edge Processing
Faroudja DCDi Edge processing is used to reduced/eliminate objectionable stair stepping that
occurs on interlaced diagonal lines. DCDi Edge processing is optimized for a memory
architecture that is unified with the memory used for scaling. This block can process 24-bit
RGB, 16-bit 4:2:2 YUV or 16-bit 4:2:2 YPrPb data streams.
Scaling Engine
The Scaling Engine accepts both 16-bit 4:2:2 YUV and 24-bit RGB inputs. It is capable of
scaling the input by a factor of 0.05 to 5.0. A flexible tap structure is used so that the number
of taps can be increased based on the number of pixels per line and whether the input is 4:2:2
YUV or 4:4:4 RGB. To reduce the amount of memory required for the vertical scaling process,
horizontal shrink is performed prior to vertical scaling and horizontal expansion happens after
vertical scaling. The maximum number of pixels per line supported by the vertical scalar is
1366.
CONFIDENTIAL – DO NOT COPY
Page 7-13
File No. SG-0219
Hide quick links:
Advertisement
Table of Contents
