Vizio VP50HDTV10A Service Manual

Vizio vp50hdtv10a 50-inch plasma tv service manual
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Service Manual
Model #: VIZIO VP50HDTV10A
V, Inc
320A Kalmus Drive Costa Mesa, CA 92626
TEL : +714-668-0588 FAX :+714-668-9099
Top Confidential

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Summary of Contents for Vizio VP50HDTV10A

  • Page 1 Service Manual Model #: VIZIO VP50HDTV10A V, Inc 320A Kalmus Drive Costa Mesa, CA 92626 TEL : +714-668-0588 FAX :+714-668-9099 Top Confidential...
  • Page 2: Table Of Contents

    8. Waveforms 9. Trouble Shooting 10. Block Diagram 10-1 11. Spare parts list 11-1 12. Complete Parts List 12-1 Appendix 1. Main Board Circuit Diagram 2. Main Board PCB Layout 3. Assembly Explosion Drawing Block Diagram VIZIO VP50HDTV10A HDTV Service Manual...
  • Page 3 Use a power cable that is properly grounded. Always use the AC cords as follows – USA (UL); Canada (CSA); Germany (VDE); Switzerland (SEV); Britain (BASEC/BS); Japan (Electric Appliance Control Act); or an AC cord that meets the local safety standards. VIZIO VP50HDTV10A HDTV Service Manual...
  • Page 4: Features

    Chapter 1 Features Wall-mountable New WIDE HD Plasma Panel:1366 x 768 (H x V) TruSurround XT sound system and DCDi by Faroujia video image High definition digital interface – HDMI HDCP supportive Multiple-screen display (picture-on-picture/picture-in-picture) Selectable picture mode 3-language On Screen Display 2 S-video and Composite video inputs 2 Component video inputs 2 HDMI inputs...
  • Page 5: Specifications

    Chapter 2 Specification 1. OPTICAL CHARACTERISTICS Note Item Specification Display Pixels 1366 (H) x 768 (V) pixels Display Cells 4,098 (H) x 768 (V) cells Pixel Pitch 0.810 mm (H) X 0.810mm (V) Pixel Type Non-stripe Color Depth 1,024 (R) x 1,024 (G) x 1,024 (B) colors Active Display Area 1106.5 mm (H) x 622.1 mm(V) Brightness (panel spec)
  • Page 6 Composite Video signal: H: 15.734KHz V: 60Hz (NTSC) Component signal: YPbPr/YCbCr H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz(NTSC-480p) H: 45KHz V: 60Hz(NTSC-720p) H: 33KHz V: 60Hz(NTSC-1080i) RF Connector CONFIDENTIAL – DO NOT COPY Page 2-2 File No. SG-0219...
  • Page 7 3. INPUT CONNECTORS Input Label Connector Type Input Label Connector Type SERVICE1 RJ-11 x 1 COMPONENT1 YPb/Cb Pr/Cr RCA Jack x 3 Audio RCA Jack x 2 SERVICE2 RJ-11 x 1 COMPONENT2 YPb/Cb Pr/Cr RCA Jackx 3 Audio RCA Jack x 2 HDMI1 19 pin HDMI x 1 RCA Jack (CVBS) x 3...
  • Page 8 7. ENVIRONMENT Operating Temperature: 0~40℃ Relative humidity: 20%~80% RH Altitude: 0~6,560 ft Non-operating Temperature: -20~60℃ Relative humidity: 10%~90% RH Altitude: 0~9,840 ft 8. DIMENSIONS Height: 871 mm Width: 1241mm Depth: 310 mm (with standard), 99 mm (without standard) 9. WEIGHT 54.5 +/- 1.5 kgs Gross 65.0 +/- 2.0 kgs CONFIDENTIAL –...
  • Page 9: On Screen Display

    Chapter 3 On Screen Display Main unit button Buttons Name MENU CH+/▲ CH-/▼ VOL+/► VOL-/◄ INPUT OSD Adjustment Main OSD Tree Mode Image Settings Picture Mode VIDEO (Custom,vivid, Movie,Game,Sport) VIDEO Brightness(0~100) VIDEO Contrast(O~100) VIDEO Saturation(0〜100) VIDEO Hue(-50~50) VIDEO Sharpness(0~24) VIDEO Advanced VIDEO Noise Reduction VIDEO...
  • Page 10 Mode VIDEO Custom Color VIDEO Red(0~100) Green(0〜100) VIDEO VIDEO Blue(0~100) Auto Adjustment lmage Position Phase CIocks/Line Color Temp Warm(5400K) Standard(6500K) Cool(9300K) User Red(0~100) Green(0〜100) Blue(0~100) Display Settings 16:9、4:3、Zoom、 VIDEO Aspect Ratio Panoramic* 16:9、4:3 Aspect Ratio Off, Large PIP, PIP Mode Small PIP, POP PIP Position Top-Left,...
  • Page 11 Mode Top-Right, Bottom-Left, Bottom-Right PIP Input ** Audio Settings Bass(0~20) Treble(0~20) Balance(-10~10) SRS TS XT(On,Off) Auto Volume(On,Off) Speakers(On﹑Off) Fixed Volume﹑Variable Volume Audio Out*** Parental Controls VIDEO Password VIDEO Settings VIDEO TV Rating TV Youth (Unblocked、 VIDEO Blocked) TV Youth 7 (Unblocked、...
  • Page 12 Mode (Unblocked、 Blocked) TV PG (Unblocked、 VIDEO Blocked) TV 14 (Unblocked、 VIDEO Blocked) TV MA (Unblocked、 VIDEO Blocked) VIDEO Unblocked VIDEO Movie Rating Movie G (Unblocked、 VIDEO Blocked) Movie PG (Unblocked、 VIDEO Blocked) Movie PG-13 (Unblocked、 VIDEO Blocked) Movie R (Unblocked、...
  • Page 13 Mode Movie NC-17 (Unblocked、 VIDEO Blocked) Movie X (Unblocked、 VIDEO Blocked) VIDEO Unblocked Block VIDEO Unrated(No﹑ Yes) Change VIDEO Password Please enter new VIDEO password Please re-enter VIDEO new password Clear All VIDEO (No,Yes) Setup Closed Caption CC1, CC2, CC3, CC4, TEXT1, Display TEXT2, TEXT3,...
  • Page 14 Mode English, French, Language Spanish Factory Reset (No,Yes) Image Cleaner Firmware Version TV Menu Auto Scan Set Channel (Add/Skip) Cable/Antenna DTV Menu CONFIDENTIAL – DO NOT COPY Page 3-6 File No. SG-0219...
  • Page 15 DTV Menu DTV Menu A.DTV Tuner Setup a.Time Zone 1.Hawall 2.Eastern Time 3.Indiana 4.Central Time 5.Mountain Time 6.Arizona 7.Pacific Time 8.Alaska b.Cable/Air/Auto c.Scan**** d.Manual Scan**** Scan mode Add-on Mode Range Mode From Channel To Channel e.Channel Skip f.Digital Audio Out CONFIDENTIAL –...
  • Page 16 DTV Menu 1.PCM 2.OFF 3.Dolby Digital B.Closed Caption a.Analog Closed Caption CC1~CC4、OFF b.Digital Closed Service1~Service6 CAPTION 、OFF c.Digital Closed Style 1.As Broadcaster 2.Custom (1)Font Size Large Small Medium (2)Font Color Black White Green Blue Cyan CONFIDENTIAL – DO NOT COPY Page 3-8 File No.
  • Page 17 DTV Menu Yellow Magenta (3)Font Opacity Solid Translucent Transparent (4)Background Color Black White Green Blue Cyan Yellow Magenta (5)Background Opacity Solid Translucent Transparent (6)Window Color Black CONFIDENTIAL – DO NOT COPY Page 3-9 File No. SG-0219...
  • Page 18 DTV Menu White Green Blue Cyan Yellow Magenta (7)Window Opacity Solid Translucent Transparent Parental control C. Password Channel Block * HDMI and Component 720P/1080i inputs do not support Panoramic. **See below for detailed information regarding the PIP sources. CONFIDENTIAL – DO NOT COPY Page 3-10 File No.
  • Page 19 Component 1 Component 2 HDMI 1 HDMI 2 MAIN Component 1 Component 2 HDMI 1 HDMI 2 Remark: (1) “ ” – Indicates which inputs are available for PIP and POP modes. (2) For AV1 and AV2, S-Video has priority. If a signal is connected to AV1 S-Video by itself or signals are connected to AV1 S-Video and AV1 Video simultaneously, then S-Video will be the only choice for AV1.
  • Page 20: Factory Preset Timings

    Chapter 4 Factory preset timings This timing chart is already preset for this plasma monitor. 1. PC analog preset modes Horizontal Vertical Refresh Horizontal Vertical Mode Sync Sync Pixel Rate Resolution Rate Frequency Frequency Remark Polarity Polarity (MHz) (Hz) (KHz) (Hz) (TTL) (TTL)
  • Page 21 2. HD video digital preset modes at HDMI Mode No. Resolution 480i 480p 720p 1080i 3. HD digital preset modes at DVI Through HDMI interface by an optional interface cable 2.3.3.1 video input. 3. 1 Video input Mode No. Resolution 480i 480p 720p...
  • Page 22: Pin Assignment

    Chapter 5 Pin Assignment (1) RF Connector RGB Connector a. Type: Analog b. Frequency: H: 30-80KHz V: 60-85Hz c. Signal level: 0.7Vp-p d. Impedance: 75Ω e. Synchronization H/V separate sync: H/V composite sync: Sync on Green Video bandwidth: 135MHz g. Connector type: 15-pin D-Sub, female CONFIDENTIAL –...
  • Page 23 Pin Assignment Pin Assignment Red video input Green video input Ground Blue video input No connection Ground (SDA) Ground Horizontal sync (Composite sync) Red video ground Vertical sync Green video ground (SCL) Blue video ground HDMI a. Frequency: H: 15.734KHz V: 60Hz H: 31KHz V: 60Hz...
  • Page 24 Pin 19 Pin 1 Pin 2 Signal Assignment Signal Assignment TMDS Data2+ TMDS Data2 Shield TMDS Data2- TMDS Data1+ TMDS Data1 Shield TMDS Data1- TMDS Data0+ TMDS Data0 Shield TMDS Data0- TMDS Clock+ TMDS Clock Shield TMDS Clock- Reserved (N.C. on device) EDID/CEC Ground +5V Power Hot Plug Detect...
  • Page 25 S-Video Connector 1, 2 = GND 3 = Luminance (Y) 4 = Chrominance(C) a. Frequency: H: 15.734KHz V: 60Hz (NTSC) b. Signal level: Y: 1Vp-p C: 0.286Vp-p c. Impedance: Y: 1Vp-p d. Connector type: 4-pin mini DIN Y-Cb/Pb-Cr/Pr Component video signal a.
  • Page 26 (8) Video audio in a. Signal level: 0.7Vrms b. Impedance: 47KΩ c. Frequency Response: 250Hz-20KHz d. Connector type: RCA L/R: (9) SPDIF Digital Audio Out (Optical) a. Peak emission wave length: 630 – 690 µm b. Transmission Speed: 13.2M pbs Connector type: Optical fiber transmitter (10) Earphone...
  • Page 27 Chapter 6 Main/ATSC Board Internal I/O Connections MAIN Board CN1 “DC POWER INPUT’ Description PDP_+5Vsc PDP_+5Vsc PDP_+5Vsc PDP_+12V PDP_+12V PDP_+12V_FAN PDP_FGND CN2 “DC POWER INPUT’ Description PDP_Audio PDP_Audio CN3 “DC POWER INPUT/OUTPUT’ Description VS_ON RLY_ON PDP_+5Vsb BRIGHT CONFIDENTIAL – DO NOT COPY Page 6-1 File No.
  • Page 28 CN5 CONNECTION “KEYPAD” Description LED2_KEYPAD KEY_VCC ADC_IN2 +3.3V_LBADC ADC_IN1 LED1_KEYPAD_BUF CN6 CONNECTION “HDMI/ATSC_UP” Description 51_TXD 51_RXD CN7 CONNECTTION “ODC2BI” Description VGA_SCL_CTZ VGA_SDA_CTZ CONFIDENTIAL – DO NOT COPY Page 6-2 File No. SG-0219...
  • Page 29 CN12 FAN CONNECTION Description FANIN1 +12V_FAN FGND CN13 FAN CONNECTION Description FANIN1 +12V_FAN FGND J7 CONNECTION “SPEAKER R” Description J8 CONNECTION “SPEAKER L” Description CONFIDENTIAL – DO NOT COPY Page 6-3 File No. SG-0219...
  • Page 30 W1 CONNECTION “LVDS” Description Description TXA3+ TXA3- TXAC+ TXAC- TXA2+ TXA2- TXA1+ TXA1- TXA0+ TXA0- +5V_SW +5V_SW +5V_SW TXB3+ TXB3- VS_ON SCL_33V SDA_33V CONFIDENTIAL – DO NOT COPY Page 6-4 File No. SG-0219...
  • Page 31 W1 CONNECTION “ATSC BOARD” Description Description SCL_5V ATSC_CLK SDA_5V ATSC_RST ATSC_WS ATSC_RDY ATSC_DA SV1_CTZ / SV1_HUD ATSC_Y N / C ATSC_Pb SIF_Tuner1 ATSC_Pr SIF_Tuner2 N / C N / C +12V_SW ATSC_Audio_L +12V_SW ATSC_Audio_R +5V_SW ATSC_TX +5V_SW ATSC_RX +5V_SW CHKTNR0 +5V_SW +5V_SW J3 SELECT KEY POWER...
  • Page 32 J9 CONNECTION “PROGRAMUPDATA” Description Default ARXD ARXD_HUD “ON” ADD JUMPER , “OFF” NO JUMPER J10 CONNECTION “PROGRAMUPDATA” Description Default ATXD ATXD_HUD “ON” ADD JUMPER , “OFF” NO JUMPER CONFIDENTIAL – DO NOT COPY Page 6-6 File No. SG-0219...
  • Page 33 ATSC Board W1 CONNECTION “MAIN BOARD” Description Description Tuner-SCL2 Tuner-SDA2 A01MICLK/A01BLK ORESET A01LRCK READY A01SDATA0 NTSC-CVB1 MAIN-YOUT N / C MAIN-PbOUT NTSC-SIF MAIN_PrOUT N / C HDMI-SPDIF SPDIF-Ctrl +12V_SW Audio_LCHOUT +12V_SW Audio_RCHOUT N / C U2TX N / C U2RX N / C Tuner SW N / C...
  • Page 34: Theory Of Circuit Operation

    Chapter 7 Theory of Circuit Operation The operation of User Interface The following diagram provides a brief overview of the user-interactive components of the firmware. Figure 8-1 User Interface Block Diagram The operation of keypad There are 8 keys to control and select the function of SHD-3010 and also have two LED to indicate the status of operation.
  • Page 35 The operation of Video Processor FLI8532 The Genesis Microchip FLI8532 includes an integrated 3-D Digital Video Decoder with Faroudja DCDi CinemaTM video format conversion, video enhancement, and noise reduction. The auto-detection and Faroudja DCDi CinemaTM technology allow the FLI8532 to detect, process, and enhance any video or PC graphic format.
  • Page 36 Analog Input Port (AFE): The FLI8532 chip has a sophisticated Analog Front End with 16 reconfigurable inputs through and analog multiplexer to anti-alias filters before the Analog to Digital Converters (ADCs). These integrated features eliminate the need for any devices between the input connector and the pin of the FLI8532.
  • Page 37 PORTA also includes optional signals (DIP_EXT_CLAMP, DIP_EXT_COAST, DIP_CLEAN_HS_OUT) for interfacing to external ADC/PLL devices. These signals are not present on PORTB. Bits 7 to 0 of PORTA can be configured as a bidirectional interface for media card applications. Inputs to the digital input port are TTL compatible with a maximum clock speed of 135MHz.
  • Page 38 LVDS Transmitter: Two LVDS channels (A and B) are available on the output of the FLI8532 to transmit data and timing information to the display device. The following diagram shows the available LVDS mapping for 30-bit LVDS output which is applying to PDP panel spec: 30-bit LVDS Output Stream To Configure for 30-bit LVDS with this data mapping:...
  • Page 39 On Chip Microcontroller: FLI8532 on-chip micro-controller (OCM) serves as the system micro-controller. It programs the FLI8532 and manages other devices in the system such as the keypad and non-volatile RAM (NVRAM) using general-purpose input/output (GPIO) pins. The OCM can address a 22-bit address space to utilize 4 MB external ROM Figure 8-5 FLI8532 OCM block diagram The OCM executes a firmware program running from external ROM, as well as driver-level (or Application Programming Interface –...
  • Page 40 The two-wire protocol requires each slave device to be addressable by a 7-bit identification number. A two-wire data transfer consists of a stream of serially transmitted bytes formatted as shown in the figure below. A transfer is initiated (START) by a high-to-low transition on MSTR_SDA while MSTR_SCL is held high.
  • Page 41 Clock Generation The FLI8125 accepts the following input sources: 1.Crystal Input Clock (TCLK and XTAL). This is the input pair to an internal crystal oscillator and corresponding logic. Alternatively, a single ended TTL/CMOS clock input can be driven into the XTAL pin (leave TCLK as n/c in this case). 2.External Clocks on various GPIOs for test purposes 3.Host Interface Transfer Clock (SCL), I2C slave SCL for DDC2Bi and another SCL for Serial Inter-Processor Communication (SIPC)
  • Page 42 Figure 8-8 FLI8125 Internally Synthesized Clocks Analog Front End The Analog Front End is responsible for selecting and capturing the desired analog input video stream. Overall application cost is reduced by providing analog switching capabilities for 16 separate analog signals. These signals are re-configurable as different combinations of composite, S-Video, YPrPb and RGB video streams depending upon the end application.
  • Page 43 Figure 8-9 Analog Input Port The Analog Front End provides the capability to capture 16 analog video inputs which can be a combination of Composite (CVBS), S-Video (SY, SC), YPrPb (Y, Pr, Pb) or RGB (R, G, B). The Analog Source Selectors are responsible for switching the desired analog inputs to the ADCs for digitization.
  • Page 44 Figure 8-10 Digital Datapath Digital Input Port The Digital Input Port is 24-bit input bus that can be connected to external DVI receivers, video decoders, etc. and is able to accept either 8-bit CCIR656 data, 16-bit 4:2:2 YUV data or 24-bit RGB data.
  • Page 45 Input Capture The Input Capture block is responsible for extracting valid data from the input data stream and creating the required synchronization signals required by the data pipeline. This block also provides stable timing when no stable input timing exists. The selected input data stream is cropped using a programmable input capture window.
  • Page 46 Image Processing The following figure shows the various image processing blocks that operate on the captured video data stream. Each block is individually selectable and can be removed from the processing chain via a selectable bypass path. When a processing block is bypassed, it automatically enters a low power mode to help reduce overall power consumption.
  • Page 47 Display Output Interface The Display Output Port provides data and control signals that permit the connection to a variety of flat panel devices using a 24-bit TTL or LVDS interface. The output interface is configurable for single or dual wide LVDS in 18 or 24-bit RGB pixels format. All display data and timing signals are synchronous with the DCLK display clock.
  • Page 48 Figure 8-13 Display Windows and Timing Data captured by the Input Capture Window and processed by the various image manipulation blocks is output in the Display Active Window. This window is always in the foreground and lies on top of all other output windows, except OSD overlay windows. Typically the Display Active Window is set to the same size as the output of the Scaling Engine.
  • Page 49 The benefit of dithering is that the eye tends to average neighboring pixels and a smooth image free of contours is perceived. Dithering works by spreading the quantization error over neighboring pixels both spatially and temporally. Two dithering algorithms are available: random or ordered dithering.
  • Page 50 Figure 8-14 FLI8125 OCM Programming The operation of HDMI Sil9011 The SiI 9011 provides one HDMI input port. The SiI 9011 video output goes to a video processor while the audio output goes to an audio DAC. CONFIDENTIAL – DO NOT COPY Page 7-17 File No.
  • Page 51 Figure 8-15 HDMI 9011 Block Diagram TMDS Digital Core The core performs 10-to-8-bit TMDS decoding on the audio and video data received from the three TMDS differential data lines along with a TMDS differential clock. The TMDS core supports link clock rates to 165MHz, including CE modes to 720p/1080i/1080p and PC modes to XGA, SXGA and UXGA.
  • Page 52 Data Input and Conversion Mode Control Logic The mode control logic determines if the decrypted data is video, audio or auxiliary information, and directs it to the appropriate logic block. Video Data Conversion and Video Output The SiI 9011 can output video in many different formats (see examples in Table 2). The receiver can also process the video data before it is output, as shown in Figure 5.
  • Page 53 The operation of TV route TV signal is processes to the tuner and output toMTK8205 the MTK8205 generates the vertical and horizontal timing signals for display device. Audio is processes to the tuner output to SIF circuit and output to 4450. The operation of DTV route DTV signal is processes to the tuner and output to MT5112 who handle ATSC input to match MPEG-2 package, then transfer to MT5351.
  • Page 54: Waveforms

    Chapter 8 Waveforms 1. Ripple Voltage (1) PDP_+5Vsc (CN1.1) (2) PDP_+12V (CN1.7) Page 8-1 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 55 (3) PDP_+5Vsb (CN3.4) (4) FLI8125 (U10) +3.3V_I/O_HUD Page 8-2 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 56 +3.3V_ADC_HUD +1.8V_ADC_HUD Page 8-3 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 57 (5) FLI8532 (U13) +3.3V_I/O +1.8V_ADC Page 8-4 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 58 +2.5V_DDR +1.8V_CORE Page 8-5 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 59 (6) NT5DS16M16CS-5T (U16, U17) (7) Am29LV320DT90-ED (XU1) Page 8-6 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 60 (8) LM2660 (-5V_N of the U29) Page 8-7 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 61 2. Clock Timing (1) NT5DS16M16CS-5T DDR clock (pin 45 of the U16 or U17) (2) FLI8125 Crystal clock (pin 15 of the U10) Page 8-8 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 62 Hudson output clock (3) FLI8532 Crystal clock (pin B26 of the U13 or pin 1 of the C155) Cortze output clock Page 8-9 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 63 (4) MSP4450G crystal clock (pin 55 of the U32) Page 8-10 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 64 (5) SiI9011CLU crystal clock (pin 84 of the U35 and U42) (6) IC SM5964C40J crystal clock (pin 20 of the U38) Page 8-11 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 65 3. Horizontal and Vertical sync. Timing (1) VGA input (1024x768x60Hz) H-sync Page 8-12 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 66 V-sync Page 8-13 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 67 (2) SiI9011CLU (U35 and U42) BHS-sync Page 8-14 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 68 BVS-sync Page 8-15 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 69 Page 8-16 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 70 ATSC Board 1. Voltage Measurement (1) 12V (+12V, C4) (2) 5V (+5V, C239) Page 8-17 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 71 (3) 3.3V (DV33, C11) (4) 2.5V (DV25, C185) Page 8-18 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 72 (5) 1.8V (DV18, C64) (6) 1.25V (+1V25_DDR, C148) Page 8-19 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 73 (7) 1.2V (DV12, C26) Page 8-20 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 74 2. Clock Timing (1) MT5351 Clock Timing (U10 B2-OXTALI) (2) MT5112 Clock Timing (U9 97-XTAL1 / 96-XTAL2) Ch1 – XTAL1 / Ch2 – XTAL2 Page 8-21 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 75 (3) Memory Clock Timing (U13-45, MEM_CLKA) (4) Memory Clock Timing (U12-45, MEM_CLKA) Page 8-22 CONFIDENTIAL – DO NOT COPY File No. SG-0219...
  • Page 76: Trouble Shooting

    Chapter 9 PDP Trouble Shooting A. SYSTEM OVERVIEW Power supply board Y driver board X driver board Display board Main board EMI filter IR board ATSC Board CONFIDENTIAL – DO NOT COPY Page 9-1 File No. SG-0219...
  • Page 77 B. PCB PARTS NAME/NUMBER AND FUNCTION DESCRIPTION PART NAME PART NUMBER FUNCTION ESCRIPTION POWER SUPPLY BOARD PROVIDE ALL THE POWER FOR TV SET DRIVER BOARD X ELECTRODE DRIVING BOARD DRIVER BOARD ELECTRODE DRIVING BOARD (+30V +24V) AUDIO POWER SELECTOR AUDIO POWER SUPPLY 385001020150 AIN BOARD CONNECTING TO TRANSFER DISPLY SIGNAL...
  • Page 78 ISPLAY BOARD IR BOARD CONFIDENTIAL – DO NOT COPY Page 9-3 File No. SG-0219...
  • Page 79 ATSC BOARD CONFIDENTIAL – DO NOT COPY Page 9-4 File No. SG-0219...
  • Page 80 PDP DISPLAY NOTHING 1. Main board & ATSC board block diagram ARXD ATXD_HUD U26 MAX232A ATXD ARXD_HUD ATXD_HUD ARXD_HUD U40 24LC128 EEPROM(8051) HY5DU56822CT-D4 HY5DU56822CT-D4 U20 4052 51_RXD/51_TXD U17 DDR RAM CTZ U16 DDR RAM HUD I/O SW UC_SCL/UC_SDA SST89C58 FL8532_CTZ Frame Store Frame Store KEY PAD...
  • Page 81 PDP DISPLAY NOTHING(Analog HD1/AC on/off default) Start Power LED is lighting? Check AC power cord Power LED is lighting? Press Meun or Info. Check input source Is there any OSD’s logo Remove R87. Check internal cable? Check W1 pin 27 is high? Check U13 pin AD14.
  • Page 82 PDP DISPLAY NOTHING(Analog HD1 without Pb signal) BLOCK 1 Check component 1 Trace componect 1 from Is picture on screen? (Pb signal) C259 Input To U13 circuit Is there sync? Check R196,R198 Use GProbe connect U13 fail from main to PC. Does scaler detect the signal? PDP DISPLAY NOTHING(Analog HD1 without Pr signal) BLOCK 1...
  • Page 83 PDP DISPLAY NOTHING(Analog HD1 on PIP mode without Pb signal) BLOCK 1 Check component 1 Trace componect 1 from Is picture on screen? (Pb signal) C255 Input To U10 circuit Is there sync? Check R200,R198 Use GProbe connect from main to PC. U10 fail Does scaler detect the signal? PDP DISPLAY NOTHING(Analog HD1 on PIP mode without Pr signal)
  • Page 84 PDP DISPLAY NOTHING(Analog HD2 without Pb signal) BLOCK 1 Check U23 outnput pin 28 Check component 2 Input pin 15 Is no blue color on screen? (Pb signal) C260,R197 U23 fail Input clamp voltage pin 5(+5V) Is there sync? Output clamp voltage pin 29(+5V) VCC3 pin 22,23(+5V) Input_switch_select high(+5V) Use GProbe connect...
  • Page 85 PDP DISPLAY NOTHING(Analog HD2 on PIP mode without Pb signal) BLOCK 1 Check U24 outnput pin 28 Check component 2 Input pin 15 Is no blue color on screen? (Pb signal) C288,R213 U24 fail Input clamp voltage pin 5(+5V) Is there sync? Output clamp voltage pin 29(+5V) VCC3 pin 22,23(+5V) Input_switch_select high(+5V)
  • Page 86 PDP DISPLAY NOTHING(RGB on PIP mode without screen) BLOCK 1 Check U45 Check U45 H sync output U45 pin4,R181 Check U45 H sync input U45 pin1,R185 V sync output U45 pin8,R184 pin 14 +3.3V V sync input U45 pin5,R187 Is picture on screen? Is there signal? U45 fail Check input source...
  • Page 87 PDP DISPLAY NOTHING(Composite 1 without screen) BLOCK 1 Check Q28’s Base. Check C310,R275,R274 Check Q28’s emitter. Is there signal? Is picture on screen? Q28 fail Is there signal? Is there signal? Check collector voltage(+5V). Use GProbe connect from main to PC. Q13 fail Does scaler detect the signal? Check:...
  • Page 88 PDP DISPLAY NOTHING(Composite 2 without screen) BLOCK 1 Check Q29’s Base. Check C316,R286,R285 Check Q29’s emitter. Is there signal? Is picture on screen? Q29 fail Is there signal? Is there signal? Check collector voltage(+5V). Use GProbe connect from main to PC. Q13 fail Does scaler detect the signal? Check:...
  • Page 89 PDP DISPLAY NOTHING(S-VIDEO 1 without screen) BLOCK 1 Check Q30’s Base. Check C320,R293,R292 Check Q30’s emitter. Is there signal? Is picture on screen? Q30 fail Is there signal? Is there signal? Check collector voltage(+5V). Use GProbe connect from main to PC. Q13 fail Does scaler detect the signal? Check:...
  • Page 90 PDP DISPLAY NOTHING(S-VIDEO 1 on PIP mode without screen) BLOCK 1 Check Q30’s Base. Check C318,R291,R292 Check Q30’s emitter. Is there signal? Q30 fail Is picture on screen? Is there signal? Is there signal? Check collector voltage(+5V). Use GProbe connect from main to PC.
  • Page 91 PDP DISPLAY NOTHING(S-VIDEO 2 without screen) BLOCK 1 Check Q33’s Base. Check C332,R316,R320 Check Q33’s emitter. Is there signal? Is picture on screen? Q33 fail Is there signal? Is there signal? Check collector voltage(+5V). Use GProbe connect from main to PC. U13 fail Does scaler detect the signal? Check:...
  • Page 92 PDP DISPLAY NOTHING(S-VIDEO 2 on PIP mode without screen) BLOCK 1 Check Q33’s Base. Check C331,R313,R320 Check Q33’s emitter. Is there signal? Q33 fail Is picture on screen? Is there signal? Is there signal? Check collector voltage(+5V). Use GProbe connect from main to PC.
  • Page 93 PDP DISPLAY NOTHING(Digital 2 U35 with PORT B without screen) BLOCK 1 Check input source? Is picture on screen? Check U37 I2C bus D66 fail Check U37 power Check D66 and D65 SCL Pin 6 5V Pin 8 Are there 5V output? SDA pin 5 D65 fail Check U35 pin 90...
  • Page 94 Block 2 start HDMI’s chip Check U38’s power Check U2’s +5V_SW communicate with Pin 44,35 pin 7,8 SM5964,is ok? Check Y3 11.0592MHz Check U38’s UART Check U20 TxD pin 13 pin 16 +5V U20 fail RxD pin 11 Pin 10 output select=high Check R143,R144 U13 fail CONFIDENTIAL –...
  • Page 95 DDC R ROUBLE OF EADING Start Support DDC2B 1.Analog cable ok? Analog DDC OK? 2.Voltage of +5V_BUF ok? 3.Check U21 4.Is compliant protocol? Support DDC2B 1.HDMI cable ok? Digital HDMI1 DDC OK? 2.Voltage of VCC5_E2P_2ok? 3.Check U44 4.Is compliant protocol? Support DDC2B 1.HDMI cable ok? Digital HDMI2 DDC OK?
  • Page 96 PDP N O SOUND PDP NO SOUND Start Audio power DC power ok? Check F2 output has +24V? Audio power fail Check U19.8 and U19.9 Check audio AMP U19 has output? Check C436,C430 input siganl? Check Audio AMP U19 Block 3 has output? speaker fail Appstest 90 1 0x14 0x3540...
  • Page 97 TROUBLE OF THE DTV CONFIDENTIAL – DO NOT COPY Page 9-22 File No. SG-0219...
  • Page 98: Block Diagram

    Chapter 10 Block Diagram System Block Diagram POWER BOARD Y DRIVER BOARD X DRIVER BOARD LVDS BOARD CN13 CN12 MAIN BOARD ATSC BOARD IR BOARD Fillter CONFIDENTIAL – DO NOT COPY Page 10-1 File No. SG-0219...
  • Page 99 Main board System Block Diagram ARXD ATXD_HUD VEDIO U26 MAX232A ATXD ARXD_HUD ATXD_HUD ARXD_HUD U40 24LC128 EEPROM(8051) HY5DU56822CT-D4 HY5DU56822CT-D4 U20 4052 51_RXD/51_TXD U17 DDR RAM CTZ U16 DDR RAM HUD I/O SW UC_SCL/UC_SDA SST89C58 FL8532_CTZ Frame Store Frame Store KEY PAD DDR Interface DDR Interface ADATA[0:23]...

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