QUANTA S100-L11SL User Manual page 4

[0.3.1]
T
ERM
IPMI Intelligent Platform Management Interface
ITP In-Target Probe
KB 1024 bytes.
KCS Keyboard Controller Style
KVM Keyboard, Video, Mouse
LAN Local Area Network
LCD Liquid Crystal Display
LCT Lower Critical Threshold
LED Light Emitting Diode
LNCT Lower Non-Critical Threshold
LNRT Lower Non-Recoverable Threshold
LPC Low Pin Count
LSI Large Scale Integration
LUN Logical Unit Number
MAC Media Access Control
MB 1024 KB
MD2 Message Digest 2 – Hashing Algorithm
Message Digest 5 – Hashing Algorithm – Higher Secu-
MD5
rity
Ms Milliseconds
Mux Multiplexer
NIC Network Interface Card
NMI Non-maskable Interrupt
NM Node Management
OBF Output buffer
OEM Original Equipment Manufacturer
D
EFINITION
[0.3.1]
T
ERM
Ohm Unit of electrical resistance
PDB Power Distribution Board
PEF Platform Event Filtering
PEP Platform Event Paging
PERR Parity Error
POH Power-On Hours
POST Power-On Self Test
PWM Pulse Width Modulation
RAC Remote Access Card
RAM Random Access Memory
RMCP Remote Management Control Protocol
ROM Read Only Memory
Real-Time Clock. Component of the chipset on the
RTC
baseboard.
RTOS Real Time Operation System
SCI Serial Communication Interface
SDC SCSI Daughter Card
SDR Sensor Data Record
Serial Electrically Erasable Programmable Read-Only
SEEPROM
Memory
SEL System Event Log
SERR System Error
A two-wire interface based on the I
SMBus
SMBus is a low-speed bus that provides positive
addressing for devices, as well as bus arbitration
Server Management Interrupt. SMI is the highest prior-
SMI
ity non-maskable interrupt
A
CRONYMS
D
EFINITION
2
C protocol. The