Rfl6000 Overview - Motorola A840 Service Manual

Digital wireless telephone
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Figure 7. RFR6000 Block Diagram

RFL6000 Overview

Numerous secondary functions are integrated on-chip as well: the Rx LO generation
and distribution circuits; the GPS VCO circuit; and various interface, control, and
status circuits. The RFR6000 Zero-IF architecture and highly integrated imple-
mentation greatly reduces handset PCB size and material costs compared to earlier-
generation RFICs. Major RFR6000 functional blocks are described in this chapter's
subsections.
The RFR6000 IC accepts as many as three inputs from the handset RF front-end
design (PCS, Cellular, and GPS). The analog Baseband outputs interface with one
of QUALCOMM's Mobile Station Modem (MSM6XXX) devices that also provide
status and control signaling. Power reduction features controlled by the MSM (such
as selective circuit power-down, gain control, and bias control) extend handset
standby time. Integrated Rx LO circuits, ideally supplemented by the RFT6100
transmitter IC, provide frequency plan flexibility and further reduce PCB parts
count.
The device is fabricated using an advanced SiGe BiCMOS process that accommo-
dates high-frequency, high-precision analog circuits as well as low-power CMOS
functions and is designed to operate with 2.7 to 3.0 volt power supplies. Although
the MSM operates at lower voltages, compatibility is assured and latch-up is
prevented by RFR6000 input and output buffers when its VDDM (pin 23) is
connected to the MSM pad voltage.
The RFR6000 IC is available in the 40-pin bump chip carrier (40 BCCP) package
that includes a large center ground slug for improved RF grounding, mechanical
strength, and thermal continuity.
The RFL6000 is a dual LNA IC, an integral component of QUALCOMM's radioOne
Zero-IF chipset. All radioOne ICs are highly integrated and fulfill specific functions;
functional requirements are partitioned between the ICs to yield complete, optimal
transceiver implementations. Overall radioOne performance depends on the com-
bined, complementary performance of all the ICs in the chipset
June 07, 2004
Theory of Operation
23

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