Block Diagram - Video Process Section - Sony STR-DA5300ES Service Manual

STR-DA5300ES
6-6. BLOCK DIAGRAM – VIDEO PROCESS Section –
Q [4] -Q [11],
Q[16] -Q[23], Q[28]-Q[35]
ODCK, HSYNC, VSYNC, DE
32
Q [4] -Q [11],
Q[16] -Q[23],
(Page 36)
24
Q[28]-Q[35]
ODCK
HSYNC
VSYNC
DE
X3603
19.6608MHz
SD-RAM
IC3618
DATA BUS
DQ0 – DQ15 FSDATA [16] – FSDATA [31]
ADDRESS BUS
FSADD [0] – FSADD [12]
A0 – A12
45
CLK
/CLK 46
CKE 44
26
BA0
27
BA1
CS 24
RAS 23
CAS 22
21
WE
20
LDM
UDM 47
LDQS 16
UDQS 51
SD-RAM
IC3602
DATA BUS
DQ0 – DQ15
FSDATA [0] – FSDATA [15]
ADDRESS BUS
A0 – A12 FSADD [0] – FSADD [12]
CLKP
CLK 45
CLKN
/CLK 46
CKE
CKE
44
FSBKSEL0
BA0
26
FSBKSEL1
BA1 27
FSCS0
CS 24
RAS
RAS 23
CAS
CAS
22
WE
WE
21
LDM 20
UDM 47
LDQS
16
UDQS
51
STR-DA5300ES
VIDEO PROCESSOR
IC3601
A3P AF4 CVBS_IN
A2P AF1 Y_IN
38
B2P AE2 C_IN
C3P AF5 2ND_ZONE_IN
B3P AE5 CAMERA_IN
CY_IN
C1P AC1
B1P AC2 CB_IN 39
P24 DCLK
A1P AB1 CR_IN
P25 DHS
R26 DVS
EEPROM
P26 DEN
IC3621
MSTR0_SDA AA23 5 SDA
MSTR0_SCL AA24 6 SCL
C26 TCLK
BDATA21 DR0 – DR5
I
B26 XTAL
BDATA16
BDATA13
DG0 – DG5
I
BDATA8
FSDATA16 –
FSDATA31
FSADDR0 –
FSADDR12
BDATA5
DB0 – DB5
I
D5 FSCLKP
BDATA0
C5 FSCLKN
C4 FSCKE
DOTCLK
IPCLK2 M4 139
C21 FSBKSEL0
HCSYNC_N
BHS L3 137
C20 FSBKSEL1
VSYNC_N
BVS L2 136
FSCS0
D21
BLANK_N
BHREF_DE K1 138
C24 FSRAS
D24 FSCAS
C23 FSWE
B22 FSDQM3
B17 FSDQM2
FLASH MEMORY
A22 FSDQS3
IC3615
A17 FSDQS2
OCMDATA0 –
F_D [0] – F_D [15] DQ0 – DQ15
OCMDATA15
OCMADDR1 –
F_A [1] – F_A [21] A0 – A20
OCMADDR21
ROM_CS_N AD24 26 CE
OCN_RE_N AC25 28 OE
WE
OCN_WE_N AC26 11
FSDATA0 –
FSDATA15 12 RESET
40 X1
X3602
4MHz
39
X0
A11 FSDQM1
RESET AD9 126 Faroudja UCOM RESET
A6 FSDQM0
FSDQS1
B11 MSTR1_SCL A3 142 Faroudja UCOM BUSY
B6 FSDQS0
MSTR1_SDA A2 125 Faroudja Power DETECT
OCM_UDI_1 B3 141 Faroudja UCOM UART TX
OCM_UDO_1 B2 140 Faroudja UCOM UART RX
(Page 41)
(Page 42)
OSD CONTROLLER
IC3604
FLASH MEMORY
IC3603
DR0 – DR5
DATA BUS
Y_D [0] – Y_D [15]
MD0 – MD15 DQ0 – DQ15
ADDRESS BUS
MA1 – MA24 Y_A [0] – Y_A [23] A0 – A23
DG0 – DG5
MOE_N 74 34 OE
MWE_N 73 13 WE
14 RESET
DB0 – DB5
DOTCLK
HCSYNC_N
VSYNC_N
XOUT
BLANK_N
PS0 – PS2
D0 – D7
23 25 39 28 29 30 33 – 31
15 – 22
YAMAHA_D [0] – YAMAHA_A [0] –
YAMAHA_D [7] YAMAHA_A [2]
BUFFER BUFFER
IC3620 IC3619
DIR XOE XOE
1 19 19
22 119 21 46 – 56, 59 – 63 18 64 – 72, 75 – 83
38 38
D/A CONVERTER
Q[16] -Q[23],
16
Q[28]-Q[35]
Y0 – Y7,
C0 – C7
HSYNC
23 P_HSYNC
50 S_HSYNC
VSYNC
24 P_VSYNC
49 S_VSYNC
DE
25 P_BLANK
48 S_BLANK
FREQUENCY
MULTIPLIER
IC3854
ODCK
2 IN OUT2 8 32 CLKIN_A
FSO
4
33
XIN 141
X3601
33.2MHz
142
S-RAM
IC3611
WE UB LB OE CE
17 40 39 41 6
3 8 11
AND
GATE
IC3609
1 2 10 9 12 13
26 27 25 19 7 32
MAIN UCOM UART RX 137
MAIN UCOM UART TX 138
MAIN UCOM UART BUSY 139
VIDEO SYSTEM CONTROLLER
IC3610 (3/3)
IC3850
V 44 VOUT
(Page 41)
YOUT 40
Y 42
C 43 COUT
Y/G 39 CY OUT
(Page 42)
41
CB/R 38 CB OUT
CR/B 37 CR OUT
21 22
UC3V_SDA,
UC3V_SCL
(Page 36)
33
• SIGNAL PATH
: VIDEO
51 (Page 33)
NON_LPCM 92 NON_LPCM
Flash Update RX 134 RX232C
30
(Page 35)
TX232C
Flash Update TX 135
VUCOM_RX
VUCOM_TX
VUCOM_BUSY
26
STOP (Page 35)
STOP IN 6
ENDFLAG 136 VUCOM_FLG
INITX 131 VUCOM_RST
MD2 128 VUCOM_MD