Sony STR-DA5300ES Service Manual page 142

STR-DA5300ES
Pin No. Pin Name
G14 DPBCK
H1 AD6
H2 VDDEXT
H13 DPLRCK
H14 DPDVBCK
J1, J2 AD5, AD4
J4 to J6,
GND
J9 to J11
J13
VDDINT
J14 DPDVLRCK
K1 AD3
K2 VDDINT
K4 to K6,
K9 to K11, GND
K13
K14 DPSIE
L1, L2 AD2, AD1
L4 to L6,
L9 to L11, GND
L13
L14 DPSID
M1 AD0
M2 WR
M3, M12 GND
M13 DPSIB
M14 DPSIC
N1 AD15
N2 ALE
N3
RD
N4
VDDINT
N5
VDDEXT
N6 AD8
N7
VDDINT
N8
DAI_P2
N9
VDDEXT
N10 DAI_P4
N11, N12
VDDINT
N13
GND
N14
DPSOE
P1 to P6 AD14 to AD9
DAI_P1, DAI_P3,
P7, P8, P9
DAI_P5
P10 DPSOA
P11 DPSOB
P12 DPSOC
P13 DPSOD
P14 DPSIA
142
I/O
Bit clock signal input for PCM audio input from the digital audio interface receiver, digital audio
I
processor, HDMI receiver or XM receiver
I/O
Two-way data bus with S-RAM and flash memory and address signal output to the address latch
- Power supply terminal (+3.3V)
L/R sampling clock signal input for PCM audio input from the digital audio interface receiver,
I
digital audio processor, HDMI receiver or XM receiver
O
Bit clock signal output for PCM audio output to the DSP2
I/O
Two-way data bus with S-RAM and flash memory and address signal output to the address latch
- Ground terminal
- Power supply terminal (+1.2V)
O
L/R sampling clock signal output for PCM audio output to the DSP2
I/O
Two-way data bus with S-RAM and flash memory and address signal output to the address latch
- Power supply terminal (+1.2V)
- Ground terminal
I PCM audio signal (surround back L/R) input from the HDMI receiver
I/O
Two-way data bus with S-RAM and flash memory and address signal output to the address latch
- Ground terminal
I
PCM audio signal (center, sub woofer) input from the HDMI receiver
I/O
Two-way data bus with S-RAM and flash memory and address signal output to the address latch
O
Data write enable signal output to the S-RAM and flash memory
- Ground terminal
PCM audio signal (front L/R) input from the A/D converter, digital audio processor, HDMI
I
receiver or XM receiver
I
PCM audio signal (surround L/R) input from the HDMI receiver or digital audio processor
O
Address signal output to the S-RAM and flash memory
O Address latch enable signal output terminal
O
Data read enable signal output to the S-RAM and flash memory
- Power supply terminal (+1.2V)
- Power supply terminal (+3.3V)
O Address signal output to the S-RAM, flash memory and address latch
- Power supply terminal (+1.2V)
- Not used
- Power supply terminal (+3.3V)
- Not used
- Power supply terminal (+1.2V)
- Ground terminal
O PCM audio signal output to the DSP2
O Address signal output to the S-RAM, flash memory and address latch
- Not used
O
PCM audio signal (front L/R) output to the DSP2
O
PCM audio signal (surround L/R) output to the DSP2
O PCM audio signal (center, sub woofer) output to the DSP2
O
PCM audio signal (surround back L/R) output to the DSP2
I
PCM audio signal (digital input) input from the digital audio interface receiver
Description