Memory Access; Flexible Power7 Processor Packaging And Offerings - IBM Power 710 Technical Overview And Introduction

2.1.4 Memory access

Each POWER7 processor chip has two DDR3 memory controllers, each with four memory
channels (enabling eight memory channels per POWER7 processor chip). Each channel
operates at 6.4 GHz and can address up to 32 GB of memory. Thus, each POWER7
processor chip is capable of addressing up to 256 GB of memory.
Figure 2-5 gives a simple overview of the POWER7 processor memory access structure.
POWER7 Processor Chip
Core
Core
Memory
Controller
Advanced
Buffer ASIC
Chip
Figure 2-5 Overview of POWER7 memory access structure

2.1.5 Flexible POWER7 processor packaging and offerings

The POWER7 processor forms the basis of a flexible compute platform and can be offered in
a number of guises to address differing system requirements.
The POWER7 processor can be offered with a single active memory controller with four
channels for servers where higher degrees of memory parallelism are not required.
Similarly, the POWER7 processor can be offered with a variety of SMP bus capacities that are
appropriate to the scaling-point of particular server models.
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IBM Power 710 and 730 Technical Overview and Introduction
Core Core Core
Core Core Core
Memory
Controller
Advanced
Buffer ASIC
Chip
Dual Integrated DDR3 memory controllers
• High channel and DIMM utilization
• Advanced energy management
• RAS advances
Eight high-speed 6.4 GHz channels
• New low-power differential signalling
New DDR3 buffer chip architecture
• Larger capacity support (32 GB/core)
• Energy management support
• RAS enablement
DDR3 DRAMs