Table of Contents
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DATA(15:0)
R 0 1 7
VCC
2 . 7
~OE
~CSA1
TP009
U003
R 0 1 8
C 0 0 9
(from U001)
1 u F
1 0 0 K
2 8 F 3 2 0 C 3
D 7
~CSA0
E N _ C E
F 8
TP008
E N _ O E
B 3
E N _ WE
B 4
E N _ R P
A 5
~WP_OS
E N _ WP
D 8
E 7
1
A 0
D Q 0
C 8
F 7
2
A 1
D Q 1
B 8
D 5
3
A 2
D Q 2
4
C 7
E 5
A 3
D Q 3
5
A 8
F 4
A 4
D Q 4
6
B 7
D 3
A 5
D Q 5
7
C 6
E 3
A 6
D Q 6
A 7
F 2
8
A 7
D Q 7
A 3
D 6
9
A 8
D Q 8
C 3
E 6
1 0
A 9
D Q 9
B 2
F 6
1 1
A 1 0
D Q 1 0
A 2
D 4
1 2
A 1 1
D Q 1 1
1 3
C 2
E 4
A 1 2
D Q 1 2
A 1
F 3
1 4
A 1 3
D Q 1 3
B 1
D 2
1 5
A 1 4
D Q 1 4
1 6
C 1
E 2
A 1 5
D Q 1 5
D 1
1 7
A 1 6
B 6
C 4
1 8
A 1 7
N C 1
1 9
B 5
A 1 8
2 0
A 6
A 1 9
2 1
C 5
A 2 0
2 2
VCC
~FLASH_RESET
(from U012)
R_~W
~CSC0
(from U001)
~CSB1_PB1
~RESET
(from U010)
~LWE
(from U001)
~UWE
R 0 2 1
R 0 2 3
2 . 7
C 0 1 3
1 u F
1 0 0 K
G 3
E N _ C E
B 3
E N _ WE
G 2
E N _ O E
1
A 1
C Y 6 2 1 4 8 V
B 6
A 0
I O 0
A 2
C 6
2
A 1
I O 1
B 2
F 6
3
A 2
I O 2
A 4
G 6
4
A 3
I O 3
B 4
B 1
5
A 4
I O 4
C 4
C 1
6
A 5
I O 5
7
A 5
F 1
A 6
I O 6
8
B 5
G 1
A 7
I O 7
A 6
9
A 8
C S 2
o n
C Y 6 2 1 3 8 V
1 0
H 1
A 3
A 9
N C 1
H 2
C 3
1 1
A 1 0
N C 2
N C
H 3
1 2
A 1 1
1 3
H 4
A 1 2
1 4
H 5
U005
A 1 3
1 5
H 6
A 1 4
1 6
G 5
A 1 5
G 4
1 7
A 1 6
F 4
1 8
A 1 7
F 3
1 9
A 1 8
ADD(22:1)
A009 - DISPLAY CONTROLLER SCHEMATIC
VCC
R 0 1 9
C 0 1 1
C 0 1 2
1 u F
0 . 1 u F
2 . 7
R 0 2 0
U004
1 0 0 K
C 0 1 0
0 . 1 u F
2 8 F 3 2 0 C 3
D 7
E N _ C E
TP054
F 8
E N _ O E
B 3
E N _ WE
B 4
E N _ R P
A 5
E N _ WP
D 8
E 7
0
1
0
A 0
D Q 0
C 8
F 7
1
2
1
A 1
D Q 1
B 8
D 5
2
3
2
A 2
D Q 2
3
4
C 7
E 5
3
TFT_VDD
A 3
D Q 3
4
5
A 8
F 4
4
A 4
D Q 4
5
6
B 7
D 3
5
TP011
A 5
D Q 5
6
7
C 6
E 3
6
A 6
D Q 6
A 7
F 2
7
8
7
A 7
D Q 7
A 3
D 6
8
9
8
A 8
D Q 8
C 3
E 6
9
1 0
9
A 9
D Q 9
B 2
F 6
1 0
1 1
1 0
A 1 0
D Q 1 0
A 2
D 4
1 1
1 2
1 1
A 1 1
D Q 1 1
1 2
1 3
C 2
E 4
1 2
B O A R D
A 1 2
D Q 1 2
A 1
F 3
1 3
1 4
1 3
A 1 3
D Q 1 3
B 1
D 2
1 4
1 5
1 4
A 1 4
D Q 1 4
1 5
1 6
C 1
E 2
1 5
A 1 5
D Q 1 5
D 1
1 7
A 1 6
B 6
C 4
1 8
A 1 7
N C 1
1 9
B 5
A 1 8
2 0
A 6
A 1 9
2 1
C 5
A 2 0
2 2
VCC
R 0 2 2
2 . 7
C 0 1 4
C 0 1 5
C 0 1 6
0 . 1 u F
1 u F
0 . 1 u F
TP010
G 3
E N _ C E
B 3
E N _ WE
G 2
E N _ O E
0
1
A 1
C Y 6 2 1 4 8 V
B 6
8
A 0
I O 0
A 2
C 6
1
2
9
A 1
I O 1
B 2
F 6
2
3
1 0
A 2
I O 2
A 4
G 6
3
4
1 1
A 3
I O 3
B 4
B 1
4
5
1 2
A 4
I O 4
C 4
C 1
5
6
1 3
A 5
I O 5
6
7
A 5
F 1
1 4
A 6
I O 6
7
8
B 5
G 1
1 5
A 7
I O 7
A 6
9
A 8
C S 2
o n
C Y 6 2 1 3 8 V
1 0
H 1
A 3
VCC
VCC
A 9
N C 1
H 2
C 3
1 1
A 1 0
N C 2
N C
H 3
1 2
A 1 1
1 3
H 4
A 1 2
1 4
H 5
U006
A 1 3
1 5
H 6
A 1 4
1 6
G 5
A 1 5
G 4
1 7
A 1 6
F 4
1 8
A 1 7
F 3
1 9
A 1 8
TFT_VDD
VCC
R 0 6 3
0
1
U019
S E D 1 3 7 5
C 0 5 3
C 0 5 4
1 u F
0 . 1 u F
1 9
0
D B 0
1 8
1
D B 1
1 7
2
D B 2
1 6
3
D B 3
4 4
1 5
4
E N _ T E S T
D B 4
7 7
1 4
5
E N _ WE 0
D B 5
~UWE
7 8
1 3
6
E N _ WE 1
D B 6
5 1
1 2
7
TFT_CLK1_PK0
C L K I
D B 7
7 1
1 1
8
DB_CLKO
C L K B
D B 8
7 6
9
9
R D
D B 9
~RESET
7 3
8
1 0
~CSB1_PB1
R E S E T
D B 1 0
7 4
7
1 1
C S
D B 1 1
~BS_TFT
7 5
6
R 1 9 1 D N P
1 2
B S
D B 1 2
R_~W
S H O R T
7 9
5
D N P
1 3
R D _ WR
D B 1 3
4
1 4
S H O R T
D B 1 4
7 0
3
1 5
A B 0
D B 1 5
1
6 9
A B 1
TFT_R2
2
6 8
3 7
A B 2
F P D A T 0
3
6 7
3 6
TFT_R1
A B 3
F P D A T 1
4
6 6
3 5
TFT_R0
A B 4
F P D A T 2
5
6 5
3 4
TFT_G2
A B 5
F P D A T 3
6
6 4
3 3
TFT_G1
A B 6
F P D A T 4
7
6 3
3 2
TFT_G0
A B 7
F P D A T 5
TFT_B2
8
6 2
3 1
A B 8
F P D A T 6
9
5 9
3 0
TFT_B1
A B 9
F P D A T 7
1 0
5 8
2 6
TFT_B0
A B 1 0
F P D A T 8
1 1
5 7
2 5
A B 1 1
F P D A T 9
1 2
5 6
2 4
A B 1 2
F P D A T 1 0
1 3
5 5
2 3
A B 1 3
F P D A T 1 1
1 4
5 4
A B 1 4
1 5
5 3
3 8
A B 1 5
F P L I N E
1 6
4 5
2 8
A B 1 6
F P S H I F T
4 3
TFT_VDD
TP030
L C D P WR
4 9
4 2
C N F 0
D R D Y
N C
4 8
2 2
C N F 1
G P I O 0
4 7
2
C N F 2
WA I T
VCC
4 6
3 9
C N F 3
F P F R A ME
TFT_VDD
R 0 6 4 D N P
0
B O A R D
S H O R T
R 0 6 5
D N P
1 K
R 1 9 0 D N P
C 0 5 1
C 0 5 2
0 . 1 u F
S H O R T
1 u F
B O A R D
S H O R T
C h a n g e
s u p p l y
f r o m
B P L U S _ S W
t o
R E G 3 V _ MI S C
t o
r e d u c e
f l i c k e r .
Q015
REG3V_MISC
4
3
B O A R D
S H O R T
BKLT_EN
R 1 8 8 D N P
5
2
0
(from U001)
D N P
N C
R 0 9 0
6
1
C 0 6 8
1 0 0 K
1 u F
C 0 7 0
R 0 9 2
1 0 u F
1 0 K
SIGNALS ARE ONLY
IN USE WITH
LCD DISPLAY
R 0 6 6
R 0 7 5 D N P
1 0 0
L C D _ D 0
R 0 6 7
4 7 0
R 0 7 6 D N P
1 0 0
~ P O T _ C S
0
R 0 6 8
R 0 7 7 D N P
1 0 0
~ P O T _ I N C
R 0 6 9
0
R 0 7 8 D N P
1 0 0
L C D _ D 3
4 7 0
R 0 7 0
R 0 7 9 D N P
1 0 0
L C D _ D 2
C 0 5 9
1 0 0 p F
R 0 7 1
4 7 0
R 0 8 0 D N P
1 0 0
C 0 6 0
L C D _ D 1
1 0 0 p F
R 0 7 2
4 7 0
R 0 8 1 D N P
1 0 0
C 0 6 1
L C D _ C L K
1 0 0 p F
R 0 7 3
4 7 0
R 0 8 2 D N P
1 0 0
L C D _ A C D
C 0 6 2
0
R 0 7 4
1 0 0 p F
R 0 8 3 D N P
1 0 0
L C D _ E N
C 0 6 3
1 0 0 p F
0
R 0 8 4 D N P
L C D _ L P
0
C 0 6 4
R 0 9 8
1 0 0 0 p F
1 0 0
R 0 8 5 D N P
TFT_VDD
POT_U_~D
0
C 0 6 5
0 8 6 D N P
6 8 p F
~VLCD_EN
0
R 0 8 7 D N P
L C D _ F R M
DISPLAY_VCC
0
(from Q018)
~DTACK_PG0
(to U001)
VR05
L 0 0 6
MIC+
6 . 8 V
3 9 n H
C 0 9 6
C 0 9 7
C 0 9 8
(to J001)
3 3 p F
3 3 p F
MIC-
3 3 p F
CR08
V E L +
L 0 0 3
2 2 u H
C 0 6 9
VR01
1 u F
9 . 1 V
3
V E L -
2
U020
N C
L T 1 3 0 7 B
1
R 0 9 1
BPLUS_SW
1
8
1 0 0 K
V C
L B O
2
5
Q016
3
F B
S W
S H D N
7
L B I
6
V I N
SIGNALS ARE ONLY
1
IN USE WITH KEYPAD
R 0 9 3
BACKLIGHT and LCD Display
1 5
2
J008
FLIP CONN.
C 0 5 5
1 0 0 p F
TFT_R2F
14
C 0 5 6
1 0 0 p F
TFT_RIF
15
C 0 5 7
1 0 0 p F
TFT_R0F
16
C 0 5 8
1 0 0 p F
TFT_G2F
11
TFT_G1F
12
TFT_G0F
13
TFT_B2F
8
TFT_B1F
9
TFT_B0F
10
1
7
4
5
6
R 1 8 7 D N P
3
0
C 0 6 6
C 0 6 7
B O A R D
S H O R T
1 u F
0 . 1 u F
21
22
TP039
R 0 8 8 D N P
LED_FL+
0
D N P
2
LED_FL-
1
R 0 8 9 D N P
TP040
D N P
0
R 1 8 9 D N P
20
S H O R T
D N P
(fromQ017)
B O A R D
S H O R T
19
18
17
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