Integra DTR-4.5 Service Manual page 65

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MICROPROCESSOR-TERMINAL DESCRIPTIONS
No. Terminal
1 Vref
2 AVcc
3 P97/~ADTRG/SIN4
4 P96/ANEX1/SOUT4
5 P95/ANEX0/CLK4
6 P94/DA1/TB4IN
7 P93/DA0/TB3IN
8 P92/TB2IN/SOUT3
9 P91/TB1IN/SIN3
10 P90/TB0IN/CLK3
11 P141
12 P140
13 BYTE
14 CNVss
15 P87/XCIN
16 P86/XCOUT
17 ~RESET
18 Xout
19 Vss
20 Xin
21 Vcc1
22 P85/~NMI
23 P84/~INT2
24 P83/~INT1
25 P82/~INT0
26 P81/TA4IN/~U
27 P80/TA4OUT/U
28 P77/TA3IN
29 P76/TA3OUT
TE
L 13942296513 30 P75/TA2IN/~W
31 P74/TA2OUT/W
32 P73/~CTS2/~RTS2/TA1IN/~V
33 P72/CLK2/TA1OUT/V
34 P71/RXD2/SCL2/TA0IN/TB5IN
35 P70/TXD2/SDA2/TA0OUT
36 P67/TXD1/SDA1
37 Vcc1
38 P66/RXD1/SCL1
39 Vss
40 P65/CLK1
41
P64/~CTS1/~RTS1/~CTS0/CLKS1
42 P63/TXD0/SDA0
43 P62/RXD0/SCL0
44 P61/CLK0
45 P60/~CTS0/~RTS0
46 P137
47 P136
48 P135
49 P134
50 P57/~RDY/CLKOUT
51 P56/ALE
52 P55/~HOLD
53 P54/~HLDA
54 P133
55 P132
56 P131
57 P130
58 P53/BCLK
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59 P52/~RD
60 P51/~WRH/~BHE
61 P50/~WRL/~WR
62 P127
.
63 P126
64 P125
http://www.xiaoyu163.com
Symbol I/O
Vref I
AVcc I
FLCS O
FLSDO O
FLCLK O
~FLRST O
OSDSDO O
OSDCS O
OSDCLK O
BYTE I
CNVss I
~RESET I
Xout O
Vss I
Xin I
Vcc1 I
~NMI I
REMIN I
POFF I
~VSYNC I
SYNC I
~ISS I
VDSTB O
VDSDO O
VDCLK O
VCRST O
VCSCL I/O
VCSDA I/O
232TX/FTXD O
Vcc1 I
232RX/FRXD I
Vss I
FCLK I
FBUSY I
DIGSDO O
DIGSDI I
DIGCLK O
~DSPRST O
~DSPFINT I
~DSPINT I
DSPFCS O
DSPCS O
DIRRST O
DIRCS O
~FEPM I
(DIRSDI) I
DIRINT I
ADCRST O
FSWCLK O
FSWDAT O
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~FCE I
Z2BDDAT O
i
Z2BDCLK O
Z2BDMUT O
http://www.xiaoyu163.com
2 9
8
Act. Description
Connect to Vcc. Reference voltage input terminal for A/D converter.
Connect to Vcc. Power supply terminal for A/D converter.
L Chip selector output terminal for FL tube driver
H Data output terminal for FL tube driver
CLK Clock output terminal for FL tube driver
L Reset signal output terminal for FL tube driver
H Data output terminal for on-screen display IC
H Chip select output terminal for on-screen display IC
CLK Clock output terminal for on-screen display IC
Connect to Vss. Change over input terminal of external data bus width.
Connect to Vss via a resistor. Change over terminal of processor mode.
Reset signal input terminal for microprocessor.
Oscillation circuit output terminal of main clock.
Connect to a ground terminal.
Oscillation circuit input terminal for main clock
2.7V<Vcc2 Vcc1<5.5V
L Connect to Vcc via a resistor.
L Remote control signal input terminal
L Power failure detection input terminal
L Vertical synchronization detection input terminal
H Synchronization detection input terminal
L
H Strobe signal output terminal for video switch
H Data output terminal for video switch
Q Q
CLK Clock output terminal for video switch 3 6 7 1 3 1 5
H Reset signal output terminal for Y/C separation and video converter ICs.
H Clock signal input/output terminal for Y/C separation and video converter ICs.
H Data input/output terminal for Y/C separation and video converter ICs.
H Data transfer terminal for RS-232C and flash writer.
2.7V<Vcc2 Vcc1<5.5V
H Data received terminal for RS-232C and flash writer.
Connect to ground terminal.
CLK Clock input terminal for flash writer
H Busy terminal for flash writer
H Common data output terminal for digital section
H Data input terminal from DSP IC
CLK Common clock output terminal for digital section
L Reset signal output terminal for DSDP IC
H Input terminal to inform the status change of DSP IC.
H Input terminal to inform the status change of DSP IC.
H Chip select output terminal of DSP IC
H Chip select output terminal of DSP IC
L Reset signal output terminal of DIR IC
L Chip select output terminal for DIR IC
L Connect to ground terminal via resistor. Setting terminal of flash writer.
H Data input terminal of DIR IC
H Unlock detection terminal of DIR IC
L Reset input terminal for multi channel A/D converter
CLK Clock signal output terminal of function switch
H Data output terminal of function switch
H Strobe signal output terminal of function switch co
L Connect to Vcc2 terminal via resistor. Setting terminal of flash writer.
H Data output terminal to volume and tone control IC for zone 2.
.
H Clock output terminal to volume and tone control IC for zone 2.
H Muting signal output terminal to volume and tone control IC for zone 2.
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0 5 8 2 9 9 4 2 8
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DTR-4.5
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