Clocking The 80C187; Processor Bus Cycles Accessing The 80C187; C187 I/O Port Assignments - Intel 80C186XL User Manual

Intel microprocessor user's manual
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MATH COPROCESSING

11.4.1 Clocking the 80C187

The microprocessor and math coprocessor operate asynchronously, and their clock rates may dif-
fer. The 80C187 has a CKM pin that determines whether it uses the input clock directly or divided
by two. Direct clocking works up to 12.5 MHz, which makes it convenient to feed the clock input
from the microprocessor's CLKOUT pin. Beyond 12.5 MHz, the 80C187 must use a multiply-
by-two clock input up to a maximum of 32 MHz. The microprocessor and the math coprocessor
have correct timing relationships, even with operation at different frequencies.

11.4.2 Processor Bus Cycles Accessing the 80C187

Data transfers between the microprocessor and the 80C187 occur through the dedicated, 16-bit
I/O ports shown in Table 11-7. When the processor encounters a numerics opcode, it first writes
the opcode to the 80C187. The 80C187 decodes the instruction and passes elementary instruction
information (Opcode Status Word) back to the processor. Since the 80C187 is a slave processor,
the Modular Core processor performs all loads and stores to memory. Including the overhead in
the microprocessor's microcode, each data transfer between memory and the 80C187 (via the mi-
croprocessor) takes at least 17 processor clocks.
I/O Address
The microprocessor cannot process any numerics (ESC) opcodes alone. If the CPU encounters a
numerics opcode when the Escape Trap (ET) bit in the Relocation Register is a zero and the
80C187 is not present, its operation is indeterminate. Even the FINIT/FNINIT initialization in-
struction (used in the past to test the presence of a coprocessor) fails without the 80C187. If an
application offers the 80C187 as an option, problems can be prevented in one of three ways:
Remove all numerics (ESC) instructions, including code that checks for the presence of the
80C187.
Use a jumper or switch setting to indicate the presence of the 80C187. The program can
interrogate the jumper or switch setting and branch away from numerics instructions when
the 80C187 socket is empty.
Trick the microprocessor into predictable operation when the 80C187 socket is empty. The
fix is placing pull-up or pull-down resistors on certain data and handshaking lines so the
CPU reads a recognizable Opcode Status Word. This solution requires a detailed knowledge
of the interface.
11-10
Table 11-7. 80C187 I/O Port Assignments
Read Definition
00F8H
Status/Control
00FAH
Data
00FCH
Reserved
00FEH
Opcode Status
Write Definition
Opcode
Data
CS:IP, DS:EA
Reserved

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