Kenwood TM-D710A Service Manual page 7

Pin No. Port Name I/O
90 RTC_SDA I/O RTC (RV5C386A) serial data I/O (I2C bus)
91 VOL_B I AF VOL (Band B) A/D input
92 VOL_A I AF VOL (Band A) A/D input
93 SQL_B I SQL (Band B) A/D input
94 AVSS I GND
95 SQL_A I SQL (Band A) A/D input
96 VREF I Reference voltage
97 AVCC I Analog power supply
98 PCCTS I UART inhibiting signal input from PC
99 PCRTS O UART inhibiting signal output to PC
100 MBLED I Message board connection state input
TNC MPU: 3048BTE25KBYB
(Display unit IC11)
Pin No. Port Name I/O
1 VCC - 5V power supply
CTS signal of asynchronous serial
2 HOSTCTS I
communication with host
Squelch input. H: With receive signal,
3 SQ I
L: No receive signal
4 PTT(PKSIN) O PTT output. H: Transmit, L: Receive
5 NC - Not used
6 NC - Not used
CON LED Drive. H: Light off, L: Light
7 CONLED O
on, During connection Light on
STALED Drive. H: Light off, L: Light
8 STALED O
on, Light on when transmit data exist.
9 NC - Not used
10 FWE(RESOUT) I Flash rewrite control
11 VSS - GND
3 chip TNC → Serial communication
12 GPSTX O
host data line
3 chip TNC → Serial communication
13 HOSTTX O
GPS data line
Host → Serial communication data
14 GPSRX I
line of 3 chip TNC
GPS → Serial communication data
15 HOSTRX I
line of 3 chip TNC
16 NC - L: Packet mode
Outputs 1-sec interval pulse when
17 GPSLED O position determination data from GPS
are received.
Determine the communication speed
18 ABAUD1 I with host by combination among
ABAUD1~3. Set L for 9600bps.
SEMICONDUCTOR DATA
Function
Function
TM-D710A/D710E
Pin No. Port Name I/O
Determine the communication speed
19 ABAUD2 I with host by combination among
ABAUD1~3. Set L for 9600bps.
Determine the communication speed
20 ABAUD3 I with host by combination among
ABAUD1~3. Set H for 9600bps.
CARRIER Carrier sense.
21 I
(D3(NC)) L: With carrier, H: No carrier
22 VSS - GND
23 NC - Not used
24 NC - Not used
25 B_SEL O Clock divider circuit control. L: 1/2, H: 1/1
26 NC - Not used
27~34 D8~D15 I/O Data bus of S-RAM D0~D7
35 VCC - 5V power supply
36~43 A0~A7 O Address bus of S-RAM A0~A7
44 VSS - GND
45~53 A8~A16 O Address bus of S-RAM A8~A16
54 A17(NC) O (Address bus of S-RAM A17)
55 A18(NC) O (Address bus of S-RAM A18)
56 A19 O (Inverted to CS of S-RAM)
57 VSS - GND
58 WAIT I WAIT. H: Fixed
MBOD LED control.
59 MBODLED O
H: Light off, L: Light on
MAIL LED control.
60 MAILLED O
H: Light off, L: Light on
CLKOUT(NC)
61 O Clock output (7.9872MHz). H:Sleep
(CARRIER)
Hardware standby terminal.
62 STBY I
L: Hardware standby status (Sleep action)
63 RESET I Reset terminal. L: Reset status
64 SLEEP I Sleep terminal. H: Fixed
65 VSS - GND
66 X2 I System clock input (15.9744MHz)
67 X1 O System clock output (15.9744MHz)
68 VCC - 5V power supply
69 NC - Not used
70 RD(OE) - Connected to RD terminal of S-RAM
71 HWR - Connected to WR terminal of S-RAM
72 NC - Not used
73 MD0 I MPU mode setting. Normally, H
74 MD1 I MPU mode setting. Normally, L
75 MD2 I MPU mode setting. Normally, H
Function
7