Typical Tail Circuit Implementation; Rs-449 / 422 Null Cable Diagram For 2240 - Canoga Perkins 2240 User Manual

Canoga Perkins
NOTE: If the customer's DCE does not support TT (or equivalent)
lead, a buffered interface may be needed to realign the data or the
extra clock function may be used (refer to Section 4.9). Canoga
Perkins offers a wide selection of buffered interfaces.
36
Figure 3-2.
Typical Tail Circuit
Implementation
Figure 3-3.
RS-449 / 422
Null Cable
Diagram
for 2240